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Signal Descriptions
ARM DUI 0163B Copyright © 2001-2003. All rights reserved. A-3
The signals present on the EXPA connector are described in Table A-1.
Table A-1 AHB signal assignment
Pin label Signal Description
A[31:0] Not used -
B[31:0] B[31:0] These signals connect to the FPGA on the
logic module. They are used to carry the
GIPOB[31:0] signals.
C[31:0] Not used -
D[31:0] Not used -