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vi Copyright © 2001-2003. All rights reserved. ARM DUI 0163B
3.7 CAN interface ........................................................................................... 3-14
3.8 ADC and DAC interfaces .......................................................................... 3-18
Chapter 4 Reference Design Example
4.1 About the design example .......................................................................... 4-2
4.2 Example APB register peripheral ............................................................... 4-8
4.3 UART ........................................................................................................ 4-13
4.4 SPI chip select register ............................................................................. 4-14
4.5 Synchronous serial port ............................................................................ 4-15
4.6 PWM controller ......................................................................................... 4-16
4.7 Stepper motor peripheral .......................................................................... 4-17
4.8 GPIO ......................................................................................................... 4-21
4.9 SSRAM interface ...................................................................................... 4-23
4.10 Vectored interrupt controller ..................................................................... 4-24
4.11 CAN controller interface ........................................................................... 4-26
4.12 ADC and DAC interface ............................................................................ 4-27
4.13 Peripheral information block ..................................................................... 4-28
Appendix A Signal Descriptions
A.1 EXPA .......................................................................................................... A-2
A.2 EXPB .......................................................................................................... A-4
A.3 EXPIM ........................................................................................................ A-6
A.4 Logic analyzer connector ............................................................................ A-8
A.5 Multi-ICE (JTAG) ...................................................................................... A-10
Appendix B Mechanical Specification
B.1 Mechanical information ............................................................................... B-2
B.2 Connector reference ................................................................................... B-4
Glossary