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Technical Reference Guide
Compaq iPAQ Family of Internet Devices
First Edition - March 2000
3-5
3.3 MEMORY SUBSYSTEM
The 810e chipset supports PC100 SDRAM for system memory. The memory interface consists of
a 64-bit data bus operating at 100 MHz providing a maximum throughput rate of 800 MB/s. The
system board provides two 168-pin SDRAM DIMM sockets that accommodate single- or double-
sided DIMMs.
This system is designed for using non-ECC DIMMs only
.
If using memory modules from third party suppliers the following DIMM type is recommended:
100-MHz unbuffered RAM supporting CAS latency (CL) 2 or 3 with a data access time
(clock-to-data out) of 9.0 ns or less @ CL=2 or CL=3
.
NOTE:
The 82810/82810e GMCH performs memory accesses at 100 MHz regardless of
the FSB frequency.
The RAM type and operating parameters are detected during POST by the system BIOS using the
serial presence detect (SPD) method. This method employs an I
2
C bus to communicate with an
EEPROM on each installed DIMM. The EEPROM holds the type and operating parameter data.
The supported format complies with the JEDEC specification for 128-byte EEPROMs. This
system also provides support for 256-byte EEPROMs to include additional Compaq-added
features such as part number and serial number. The SPD format as supported in this system is
shown in Table 3-3.
The key SPD bytes that BIOS checks for compatibility are 2, 9, 10, 18, 23, and 24.
If BIOS
detects EDO DIMMs a “memory incompatible” message will be displayed and the system
will halt.
If ECC DIMMs are used, all DIMMs installed must be ECC for ECC benefits (error
logging) to be realized.
Once BIOS determines the DIMM type the DRAM speed and CAS latency is checked based on
the following criteria:
Access
from
Bus Speed Cycle Time
Clock
100 MHz 10 ns 6 ns @ 50 pf loading
NOTE:
Refer to chapter 8 for a description of the BIOS procedure of interrogating
DIMMs.
Only CAS latencies of 2 or 3 are supported. If DIMMs with unequal CAS latencies are installed
then operation will occur based on the DIMM with the greatest latency.
If an incompatible DIMM is detected the NUM LOCK will blink for a short period of time during
POST and an error message may or may not be displayed before the system hangs.