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M9328MX21ADSE User’s Manual, Rev. A
3-32 Freescale Semiconductor
Table 3-19. Extension Connector PE3 Signal Description
Pin(s) Signal Description
A1 CSPI2_MOSI MASTER OUT / SLAVE IN — CSPI data signal (bidirectional)
A2 CSPI2_MISO MASTER IN / SLAVE OUT — CSPI data signal (bidirectional)
A3 CSPI2_SCLK SERIAL CLOCK — Bidirectional
A4 CSPI2_SS0 SLAVE SELECT 0 — CSPI signal (bidirectional)
A5 CSPI2_SS1 SLAVE SELECT 1 — CSPI signal (bidirectional)
A6 CSPI2_SS2 SLAVE SELECT 2 — CSPI signal (bidirectional)
A7 I2C_CLK I SQUARED C CLOCK — Serial clock, bidirectional
A8 I2C_DATA I SQUARED C DATA — Serial data, bidirectional
A9 SSI3_CLK
SYCHRONOUS SERIAL INTERFACE TRANSMITTER CLOCK — Bidirectional, output in
master mode and input in slave mode
A10 SSI3_TXD SYCHRONOUS SERIAL INTERFACE TRANSMITTED DATA — Serial output signal
A11 SSI3_RXD SYCHRONOUS SERIAL INTERFACE RECEIVED DATA — Serial input signal
A12 SSI3_FS SYCHRONOUS SERIAL INTERFACE FRAME SYNC
A13 SSI2_CLK
SYCHRONOUS SERIAL INTERFACE TRANSMITTER CLOCK — Bidirectional, output in
master mode and input in slave mode
A14 SSI2_TXD SYCHRONOUS SERIAL INTERFACE TRANSMITTED DATA — Serial output signal
A15 SSI2_RXD SYCHRONOUS SERIAL INTERFACE RECEIVED DATA — Serial input signal
A16 SSI2_FS SYCHRONOUS SERIAL INTERFACE FRAME SYNC
B1 USBG_RXDP USB OTG RECEIVED DATA PLUS input
B2 USBG_RXDM USB OTG RECEIVED DATA MINUS input
B3 USBG_TXDP USB OTG TRANSMITTED DATA PLUS output
B4 USBG_TXDM USB TRANSMITTED DATA MINUS output
B5 USBG_OE_B USB OTG OUTPUT ENABLE
B6 USBG_FS USB OTG FULL SPEED
B7 USBG_ON_B USB OTG transceiver ON
B8 USBG_SCL USB OTG SERIAL CLOCK
B9 USBG_SDA USB OTG SERIAL DATA
B10 USBH1_RXDM USB RECEIVED DATA MINUS input
B11 USBH1_RXDP USB RECEIVED DATA PLUS input.
B12 USBH1_TXDM USB TRANSMITTED DATA MINUS output
B13 USBH1_TXDP USB TRANSMITTED DATA PLUS output