Silicon Laboratories SI5322 Clock User Manual


 
Si53xx-RM
178 Rev. 0.5
DOCUMENT CHANGE LIST
Revision 0.3 to Revision 0.4
Updated AC Specifications in Table 8, “AC
Characteristics—All Devices”
Added Si5365, Si5366, Si5367, and Si5368
operation at 3.3 V
Updated Section “7.8. Frame Synchronization
Realignment (Si5368 and CK_CONFIG_REG = 1)”
Added input clock control diagrams in Section “7.4.
Input Clock Control”
Added new crystals into Table 59, “Approved
Crystals”
Updated "Appendix D—Alarm Structure" on page
144
Added "Appendix F—Typical Performance: Bypass
Mode, PSRR, Crosstalk, Output Format Jitter" on
page 154
Revision 0.4 to Revision 0.41
Added Si5324.
Revision 0.41 to Revision 0.42
Moved Si5326 specifications to the Si5326 data
sheet.
Corrected Figure 23, “Jitter Tolerance Mask/
Template.”
Simplified Section “4. Device Specifications”
Updated Figure 41, “CMOS Termination (1.8, 2.5,
3.3 V).”
Revision 0.42 to Revision 0.5
Added Si5327, Si5369, Si5374, and Si5375.
Removed Si5319 and Si5323 from the spec tables.
Updated the typical phase noise plots.
Added new appendixes G, H, I, and J.
Updated spec table values.
Added examples and diagrams throughout.