Filter
Top Products
Si53xx-RM
Rev. 0.5 83
If the selected clock enters an alarm condition, the PLL enters digital hold mode. The CKSEL_REG[1:0] controls
are ignored if automatic clock selection is enabled.
7.4.2. Automatic Clock Selection (Si5324, Si5325, Si5326, Si5367, Si5368, Si5369, Si5374)
The AUTOSEL_REG[1:0] register bits sets the input clock selection mode as shown in Table 40. Automatic
switching is either revertive or non-revertive.
CKSEL_PIN is of significance only when Manual is selected.
7.4.2.1. Detailed Automatic Clock Selection Description (Si5324, Si5325, Si5326, Si5374)
Automatic switching is either revertive or non-revertive. The default prioritization of clock inputs when the device is
configured for automatic switching operation is CKIN1, followed by CKIN2, and finally, digital hold mode. The
inverse input clock priority arrangement is available through the CK_PRIOR bits, as shown in the Si5325, Si5326,
and Si5374.
For the default priority arrangement, automatic switching mode selects CKIN1 at powerup, reset, or when in
revertive mode with no alarms present on CKIN1. If an alarm condition occurs on CKIN1 and there are no active
alarms on CKIN2, then the device switches to CKIN2. If both CKIN1 and CKIN2 are alarmed, then the device
enters digital hold mode. If automatic mode is selected and the frequency offset alarms (FOS1_INT and
FOS2_INT) are disabled, automatic switching is not initiated in response to FOS alarms. The loss-of-signal alarms
(LOS1_INT and LOS2_INT) are always used in making automatic clock selection choices.
In non-revertive mode, once CKIN2 is selected, CKIN2 selection remains as long as it is valid even if alarms are
cleared on CKIN1.
Table 39. Manual Input Clock Selection (Si5324, Si5325, Si5326, Si5374)
CKSEL_REG or CS pin Active Input Clock
0CKIN1
1CKIN2
Table 40. Automatic/Manual Clock Selection
AUTOSEL_REG[1:0] Clock Selection Mode
00 Manual
01 Automatic Non-revertive
10 Automatic Revertive
11 Reserved