Texas Instruments TNETE110A Network Card User Manual


 
PCI Configuration Registers
A-10
A.1.18 PCI Min_Gnt (@ 3Eh) and Max_Lat (@ 3Fh) Registers
These byte registers are used to specify the adapter’s desired settings for la-
tency timers. For both registers, the value specifies a period of time in units of
250 ns (quarter microsecond).
These registers are loaded from an external serial EEPROM on the falling
edge of PCI reset, during autoconfiguration. Should autoconfiguration fail (bad
checksum), then these registers are loaded with the default values, which are
currently 0x00h.
The Min_Gnt register is used for specifying how long a burst period the device
needs (assuming a 33-MHz clock). The Max_Lat register is used for specifying
how often the device needs to gain access to the PCI bus.
A.1.19 PCI Reset Control Register (@ 40h)
This register is used to disable automatic software resets. The automatic soft-
ware reset feature is for machines that do not assert the PCI bus PRST# line
during soft (Ctrl-Alt-Del) resets, but still performs diagnostics on PCI bus de-
vices. The automatic software reset feature ensures the adapter is reset (and
therefore not performing PCI bus master operations) before diagnostics are
started.
Soft resets are detected as the deassertion of the BM_En, Mem_En, and
IO_En bits in the PCI command register. This differentiates soft resets from
bus master disables, which may take place in some systems.
When a soft reset is disabled and the host machine is rebooted, ThunderLAN
must be reconfigured without resetting the adapter.
01234567
SRDIS
Byte 0
Reserved (0)
Table A–4. PCI Reset Control Register Bits
Bit Name Function
7–1 Reserved These bits are always read as 0. Writes to these bits are ignored.
0 SRDIS Soft reset disable: This bit is used to disable automatic software adapter resets. When
this bit is set to a 1, an adapter software reset (equivalent to writing a 1 to the Ad_Rst
bit) takes place whenever the BM_En, Mem_En, and IO_En bits in the PCI command
register are 0. When SRDIS is set to a 1, 0s in these bits do not cause a software reset.