Texas Instruments TNETE110A Network Card User Manual


 
Initializing
3-6
3.1.4 Turning on the I/O Port and Memory Address Decode
The next step in the GetPciConfig section of the code is responsible for turning
on the ThunderLAN controller by enabling the decode of memory and I/O port
addresses. Without this step, there is no access to the host registers and there-
fore, to the internal registers or the MII granted to the host processor.
The PCI specification calls for the shutdown of address decode in both I/O port
space and memory space upon PCI reset to avoid multiple devices responding
to bus cycles before the operating system has a chance to sort out space re-
quirements. ThunderLAN complies with this requirement. Configuration space
access is not shut down on reset, as each slot has a chip select line guarantee-
ing unambiguous accesses.
// Enable I/O and memory accesses to the adapter, and
bus master
PciWrWord(nic.DevId, PCI_COMMAND, IO_EN | MEM_EN |
BM_EN);
Where these constants have the following values:
#define PCI_COMMAND 0x04
#define IO_EN 0x0001
#define MEM_EN 0x0002
#define BM_EN 0x0004
and PciWrWord, a register level int86 O/S call, has the following definition:
void PciWrWord(WORD devid, WORD addr, WORD data).
The PciWrWord statement goes to the PCI configuration space associated
with the evaluation module (EVM) device ID and writes to the PCI command
register. This sets the three LSBs to enable I/O map decodes, memory de-
codes, and allows bus mastering to occur via the NIC.
Of the two signals, IO_EN and MEM_EN, the driver only needs to activate the
mechanism that is used to address the ThunderLAN controller: either I/O ports
or memory. Both are activated here in the sample code. BM_EN is required by
the ThunderLAN device to operate properly. All the network data must be
moved to and from the host by a ThunderLAN-initiated direct memory access
(DMA), but this capability must be separately enabled, as required by the
PCI
Local Bus Specification.
In other words, the PCI configuration register must
have all three of these bits and they must function in this way.