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10Base-T PHY Registers
A-43
Register Definitions
Table A–20. PHY Generic Status Register Bits (Continued)
Bit Name Function
1 JABBER Jabber detect: When read as 1 this bit indicates a 10Base-T jabber condition has been
detected. A jabber condition is latched (held) until the register is read. This bit has no
meaning if the AUI interface is selected.
The jabber condition occurs when a single packet transmission exceeds 20 ms (this
cannot happen through normal TLAN operation). In the jabber condition, all transmit re-
quests are ignored and collision detection is disabled, as is the internal loopback of
transmit data (when in half-duplex mode). The jabber condition persists for 28–576 ms
after the deassertion of the MTXEN pin.
0 1 Extended capability: This bit is hardwired to 1 to indicate that the extended register set
is supported.