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Adapter Host Registers
A-15
Register Definitions
Table A–5. Host
_
CMD Register Bits (Continued)
Bit FunctionName
20 EOC End of channel select: This read/write bit is used to select between the EOC, EOF, and
command bit operations. If this bit is set to a 1, then end of channel operations are se-
lected. If set to a 0, EOF operations are selected.
This bit is also used to select between status and statistics commands when the Nes
bit is set to a 0. When Nes is set to 0 and this bit is set to 1, status commands are se-
lected; otherwise statistics commands are selected.
This field is written in the same cycle as the command bits, and allows a command to
be issued in a single write cycle.
19 R/T Rx/Tx select: This read/write bit is used to select between receive and transmit com-
mand bit operations. If this bit is set to a 1, then receive command operations are se-
lected. if set to a 0, then transmit operations are selected.
This field is written to in the same cycle as the command bits, and allows a command
to be issued in a single write cycle.
18 Nes Not error/statistics: This read/write bit is used to select between status (error)/statistics
operations and channel operations. If this bit is set to a 0, then status/statistics opera-
tions are selected. If set to a 1, channel operations are selected. This field can be written
in the same cycle as the command bits, and allows a command to be issued in a single
write cycle.
17 0 This bit is always read as 0. Writes to this bit are ignored.
16 0 This bit is always read as 0. Writes to this bit are ignored.
15
Ad_Rst Adapter reset: Writing a 1 to this bit position causes the adapter to be reset. All channels
are cleared and initialized, the ThunderLAN controller is reset, and any network opera-
tions are terminated. The receiver and transmitter are placed in their stopped states.
The ThunderLAN controller’s own (sticky) reset bit is also set.
This bit is always read as a 0. There is no need to clear this bit.
If this bit is written as a 1 and and the Ints_on and Ints_off bits are also set to 1s, then
autoconfiguration of the configuration space registers from the configuration EEPROM
takes place.