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Resetting
3-8
3.2 Resetting
Resetting ThunderLAN is required when conditions such as an incorrect pow-
er-up cause the register value in the device to deviate from that needed for
proper operation. To perform either a software or hardware reset, the program-
mer must complete the steps indicated.
3.2.1 Hardware Reset
The IEEE 802.3 specification defines a power-up routine which must be fol-
lowed to ensure that ThunderLAN’s internal 10Base-T PHY powers up correct-
ly. This routine also allows for the additional delay necessary when a crystal
is used to drive the FXTL1 and FXTL2 lines.
1) Sync all attached PHYs
2) Isolate all attached PHYs by writing the PDOWN, LOOPBK, and ISOLATE
bits into the control register (the GENen_ctl register in ThunderLAN)
3) Enable the internal PHY by writing 0x4000h (LOOPBK) in the GENen_ctl
register
4) Wait 500 ms for the crystal frequency to stabilize
5) Reset the PHY state machine by asserting the LOOPBK and RESET bits
in the GENen_ctl register
6) Resync the internal PHY
7) Read the control register until bit 15 (RESET) = 0 and the PHY comes out
of reset. This is the time needed to read the register.
8) Load the selected PHY options into the GENen_ctl register
9) If using the attachment unit interface (AUI) mode, set the AUI bit in the
TLPHY_ctl register
10) Wait one second for the clocks to start