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PCI Configuration Registers
A-9
Register Definitions
pins. On reset (software or hardware), control of the interface is given to the
PCI NVRAM register.
01234567
CLOCKCDIRReservedReservedDATADDIRReservedNVPR
Byte 0
Table A–3. PCI NVRAM Register Bits
Bit Name Function
7 NVPR Nonvolatile RAM present: When this bit is set to a 1, it indicates that an external
EEPROM is present. When set to a 0, no EEPROM is present.
6 Reserved This bit is always be read as 0. Writes to this bit are ignored.
5 DDIR Data direction: When set to a 1, the EDIO pin is driven with the value of the DATA bit.
When set to a 0, the value read from the DATA bit reflects the value on the EDIO pin.
4 DATA This bit is used to read or write the state of the EDIO pin. When DDIR is set to a 1, EDIO
is driven with the value in this bit. When DDIR is set to a 0, this bit reflects the value on
the EDIO pin.
3 Reserved This bit is always be read as 0. Writes to this bit are ignored.
2 Reserved This bit is always be read as 0. Writes to this bit are ignored.
1 CDIR Clock direction: When set to a 1, the EDCLK pin is driven with the value of the CLOCK
bit. When set to a 0, EDCLK pin is not driven
†
and the value read from the CLOCK bit
reflects the incoming value on the EDCLK pin.
0
CLOCK Clock bit: This bit is used to read or write the state of the EDCLK pin. When CDIR is set
to a 1, EDCLK is driven with the value in this bit. When CDIR is set to a 0, this bit reflects
the value on the EDCLK pin.
†
The EDCLK pin is not driven when the PCI NVRAM register has control of the interface and the CDIR bit is 0 (default after PCI
reset).
A.1.16 PCI Interrupt Line Register (@ 3Ch)
This read/writable byte register is used by POST software to communicate in-
terrupt routing information. The contents of this byte have no direct effect on
the adapter operation.
A.1.17 PCI Interrupt Pin Register (@ 3Dh)
The interrupt pin register is a read-only byte register that indicates which PCI
interrupt pin the adapter uses. As the adapter is a single function device, it is
connected to PINTA#. Therefore, the register is hardwired with a value of 01h.