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ThunderLAN Overview
1.2 Networking Protocols
The MII also allows freedom in choosing a networking protocol. It allows the
use of standard 100M bps CSMA/CD PHY chips. ThunderLAN uses these sig-
nal lines to interface to an external 100M bps demand priority PHY. This gives
ThunderLAN the flexibility necessary to handle 10Base-T, 10Base-2,
10Base-5 AUI, 100Base-TX, 100Base-T4, 100Base-FX, and 100VG-AnyLAN
today, while supporting emerging technologies.
ThunderLAN is designed to simplify the software used to transmit frames, re-
ceive frames, and service the PHY events. It accomplishes this by integrating
time-consuming tasks into the controller. These tasks include:
The DMA of data into and out of the controller
A simplified, interrupt-driven frame buffer management technique
The elimination of PHY register polling through MII interrupts
DMA of data is handled through list structures. ThunderLAN’s method of han-
dling data through list structures has parallels with the method used in Texas
Instruments TI380 COMMprocessors. There are some differences, such as
the use of a 0 forward pointer.
ThunderLAN is designed to meet
PCI Local Bus Specification
, revision 2.0 for
its PCI interface standards.