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10Base-T PHY Registers
A-47
Register Definitions
A.4.6 Autonegotiation Expansion Register–AN_exp @ 0x6
LPANABLEPAGERX0LPNPABLEPARDETFLTReserved
Byte 0Byte 1
01234567
89101112131415
Table A–23. Autonegotiation Expansion Register Bits
Bit Name Function
15–5 Reserved Read as 0
4 PARDETFLT Parallel detection fault: For multi-technology PHYs, this bit indicates multiple valid links.
This PHY only supports a single technology (10Base-T) and so this bit should be
ignored.
3 LPNPABLE Link partner next page able: When this bit is set to 1, the link partner indicates that it
implements autonegotiation next page abilities.
2 0 Next page able: ThunderLAN does not support next page transmission or reception.
1 PAGERX Page received: This bit is set after three identical and consecutive link code words have
been received from the link partner and the link partner has indicated that it has received
three identical and consecutive link code words from ThunderLAN. This bit is cleared
when read.
0
LPANABLE Link-Partner Autonegotiation Able: When this bit is set to a one, the PHY is receiving
autonegotiation fast link pulse bursts from the link partner. This bit is reset to zero if the
Link-Partner is not autonegotiation able.