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B-16 SYNCHRONIZATION OF DIGITAL FACILITIES
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SYSTEM 85 AND
GENERIC 2 ONLY
TO
TN2131
0
TO
TN2131
1
TO TN492C
EXTERNAL
ALARM
POWER
BUS
SYSTEM ALARM BUS
STRATUM 3
REFERENCE #1
CLOCK
INPUT
#1
CLOCK
INPUT
#2
STRATUM 3
REFERENCE #2
PHASE
BUILD
OUT
STRATUM 3
CLOCK A
STRATUM 3
CLOCK B
SYSTEM ALARMS
-48VDC A
-48VDC
-48VDC B
RETURN
RETURN
SWITCH
ALARM
INTERFACE
TIMING
OUTPUT,
COMPOSITE
CLOCK B
TIMING
OUTPUT,
COMPOSITE
CLOCK B
Figure B-8. External Clock
Private network applications that do not have digital connections to stratum-3 or better reference sources
will not provide the Reference 1 and Reference 2 inputs or the clock-input #1 and clock-input #2 circuit
packs. These types of network applications are not allowed.
For public-network applications, the clock-input circuit pack derives a 1.544-Mbps clock signal from the
reference. The clock input #1 and #2 circuit packs generate a 4-kbps stratum-3 clock signal and supply it to
the clock and output boards. The composite clock output circuit pack monitors the 4-kbps signals from the
references and clocks and, on detecting a failure or other error, automatically changes from the online
reference clock to an alternate. Furthermore, an alarm signal alerting you of the problem is generated.
Additionally, the composite clock output circuit pack generates a 64-kbps composite clock signal. This
signal is a special bipolar (return-to-zero) signal that contains a bipolar violation every eighth bit and is
cabled to the switch (for System 85 and Generic 2, the TN2131 circuit pack).