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Technical Reference Guide
Compaq Deskpro EN Series of Personal Computers
Desktop and Minitower Form Factors
Third Edition - September 1998
4-19
When the address changes, devices on the bus may decode the latchable address (LA23..17) lines
and then latch them. This arrangement allows devices to decode chip selects and M16- before the
next cycle actually begins.
The following guidelines apply to optional ISA devices installed in the system:
♦ On bus lines that can be driven by a controller board, the driver should be able to sink a
minimum of 20 ma at 0.5 VDC and source 2 ma at 3.75 VDC.
♦ On bus lines that are driven in the low direction only (open collector), the driver should be
able to sink 20 ma at 0.5 VDC.
♦ The load on any logic line from a single bus slot should not exceed 2.0 ma in the low state
(at 0.5 VDC) or 0.1 ma in the high state (at 3.75 VDC).
♦ The logic-high voltage at the bus ranges from 3.75 VDC to 5.5 VDC. The logic low voltage
ranges from 0 VDC to 0.8 VDC.