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Document 38-08035 Rev. *K Page 25 of 83
10.1.1 Interval Timer Clock (ITMRCLK)
The Interval Timer Clock (TITMRCLK), is sourced from an
external clock, the Internal 24 MHz Oscillator, the Internal 32 kHz
Low power Oscillator, or the Timer Capture clock. A
programmable prescaler of 1, 2, 3 or 4 then divides the selected
source. The 12-bit Programmable Interval Timer is a simple
down counter with a programmable reload value. It provides a
1 μs resolution by default. When the down counter reaches zero,
the next clock is spent reloading. The reload value is read and
written while the counter is running, but the counter must not
unintentionally reload when the 12-bit reload value is only
partially stored, that is, between the two writes of the 12-bit value.
The programmable interval timer generates an interrupt to the
CPU on each reload.
The parameters to be set show up on the device editor view of
PSoC Designer when the enCoRe II Timer User Module is
placed. The parameters are PITIMER_Source and
PITIMER_Divider. The PITIMER_Source is the clock to the timer
and the PITMER_Divider is the value the clock is divided by.
The interval register (PITMR) holds the value that is loaded into
the PIT counter on terminal count. The PIT counter is a down
counter.
The Programmable Interval Timer resolution is configurable. For
example:
TCAPCLK divide by x of CPU clock (for example, TCAPCLK
divide by 2 of a 24 MHz CPU clock gives a frequency of 12 MHz.)
ITMRCLK divide by x of TCAPCLK (for example, ITMRCLK
divide by 3 of TCAPCLK is 4 MHz so resolution is 0.25 μs.)
10.1.2 Timer Capture Clock (TCAPCLK)
The Timer Capture clock is sourced from an external clock,
Internal 24 MHz Oscillator or the Internal 32 kHz Low power
Oscillator. A programmable pre-scaler of 2, 4, 6, or 8 then divides
the selected source.
Figure 10-2. Programmable Interval Timer Block Diagram
System
Clock
Clock
Timer
Configuration
Status and
Control
12-bit
reload
value
12-bit down
counter
12-bit
reload
counter
Interrupt
Controller
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