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S1F76540 Series
S1F70000 Series EPSON 2–21
Technical Manual
S1F76540
Series
Parameter Symbol Characteristics Min. Typ. Max. Unit
Regulated output load
V
RI = –20 V, VREG = –15 V,
variation
∆V
O (*3) Ta = 25°C setup 30 50 mV
0 < I
REG < 20 mA
VREF0 TC1 = VDD, TC2 = VDD –1.55 –1.50 –1.45 V
Reference voltage
V
REF1 TC1 = VDD, TC2 = VI –1.70 –1.50 –1.30 V
(Ta = 25°C)
V
REF2 TC1 = VI, TC2 = VDD –1.90 –1.50 –1.10 V
VREF3 TC1 = VI, TC2 = VI –2.15 –1.50 –0.85 V
Reference voltage
C
T0
TC1 = V
DD
, TC2 = V
DD
, SSOP product
–0.07 –0.04 0 %/°C
temperature coefficient
C
T1
TC1 = VDD, TC2 = VI, SSOP product
–0.25 –0.15 –0.07 %/°C
(*4, *5)
C
T2
TC1 = VI, TC2 = VDD, SSOP product
–0.45 –0.35 –0.20 %/°C
CT3
TC1 = VI, TC2 = VI, SSOP product
–0.75 –0.55 –0.30 %/°C
VI = –2.4 to –5.5 V
V
IH Pins used: POFF1, POFF2, FC,
0.2 V
I
V
Input voltage level
TC1, TC2
VI = –2.4 to –5.5 V
V
IL Pins used: POFF1, POFF2, FC,
0.8 V
I
V
TC1, TC2
Booster capacitance CMAX Capacitors used: C1, C2 and C3 47 µF
Table 2.3 DC characteristics (3)
Ta = –30°C to +85°C, V
DD = 0 V, VI = –5.0 V
unless otherwise noted
*1 RSAT =
∆ (V
REG – VRI)
∆I
REG
*2 ∆VR =
V
REG (VRI = –20 V) – VREG (VRI = –10 V)
∆V
RI • VREG (VRI = –10 V)
*3 ∆VO =
V
REG (IREG = 20 mA) – VREG (IREG = 0 mA)
∆I
REG
*4 CT =
| V
REF (50°C) | – | VREF (0°C) |
×
100
50°C – 0°C| V
REF (25°C) |
*5 The reference voltage and temperature coefficient of the chip products may vary depending on the mold-
ings used on each chip. Use these chips only after the temperature test.