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A.6 Messages
Appendix A-111
(7) BUS DEVICE RESET (X’0C’) : MESSAGE OUT phase (initiator → target)
This message addresses any initiators that are operating, or waiting for operation, on the target. The
message initializes those initiators by resetting their input/ output operations.
The BUS DEVICE RESET message is transferred in the asynchronous mode.
This scanner generates the UNIT ATTENTION condition to all initiators.
After being initialized, the initiators move to the BUS FREE phase.
The initiators do not intend to issue another message by activating ATN before they deactivate the
ACK of the BUS DEVICE RESET message.
(8) IDENTIFY (X’80’ to X’FF’) : MESSAGE OUT phase (initiator → target)
This message specifies either a logical unit under control of the target, or a process incorporated in
the target (maintenance, self-diagnostic, etc.).
This scanner does not support the target-incorporated process function. Therefore, if a 1 is set in
bit 5, the IDENTIFY message is rejected with the MESSAGE REJECT message.
(9) DISCONNECT (X’04’): MESSAGE IN phase (target → initiator)
Sent from the target to the initiator, this message indicates that the current link will be disconnected
but it will later have to be reconnected to complete the current process.
After successfully sending the DISCONNECT message, the target releases the BSY signal to switch
into the BUS FREE phase. The target assumes the message transfer to be successful if it detects that
the ATN signal as well as the ACK signal from the DISCONNECT message are false.
This scanner issues the DISCONNECT message if bit 6 (DiscPriv) in the IDENTIFY message from
the initiator is 1 and if a long time is expected for processing in the scanner (e.g., when the scanner
receives the READ command and prepares data to be transferred to the initiator).
6
5
4
3
2
1
0
7
1
Bit for distinguishing from other messages
1: The initiator does not permit disconnect
0: The initiator permits disconnect
1: Processed by the target alone
0: Processed by the target
and logical unit
(Reserved)
(Reserved)
Specifies a logical unit number
(for bit 4 = 0)
Specifies a process incorporated in
the
target (for bit = 1)