IBM BDM-610000049 Switch User Manual


 
BDM-610000049 Rev G Chapter 1: Introduction 7
Board Features
1.4 GHz Intel Pentium M with thermal throttling
400 MHz, source-synchronous Front Side Bus
–Math coprocessor
Supports MMX and SSE2 instructions
Internal Cache
L1 - 32KB of instruction and 32KB data; L2 - 2 MB
1.0 GHz Intel Celeron M with thermal throttling
400 MHz, source-synchronous Front Side Bus
–Math coprocessor
Supports MMX and SSE2 instructions
Internal Cache
L1 - 32KB of instruction and 32KB data; L2 - 512kB
512 or 1024 Mbytes BGA DDR SDRAM
Up to 333 MHz Data Rate
ECC corrects single-bit memory errors and detects 2-bit errors (selected models)
Stackable 120-pin PCI bus
4 Bus master add-on cards capable
3.3V or 5V PCI bus signaling
Advanced power management features including Enhanced Intel SpeedStep Technology (PX only)
Advanced Thermal Management
Auto Fan Control only runs fan when needed
SMBus Temperature Monitor for CPU and board temperature
Mini Fan Heatsink with Auto Fan control
Passive Structural Heatsink & Heatpipes in IDAN and HiDAN System Configurations
Advanced Programmable Interrupt Controller (APIC)
High resolution 100 MHz APIC timer
24 interrupt channels with APIC enabled (15 in legacy PIC mode)
Advanced Configuration and Power Interface (ACPI)
ACPI 1.0 Compliant
Supported power down modes: S1 (Power On Suspend), S3 (Suspend to RAM), S4 (Hibernate),
and S5 (Soft-Off)
CPU Clock Throttling and Clock Stop for C0 to C3 Support
Wake events include:
aDIO Interrupt
Wake-on-LAN
Real Time Clock
COM port Ring
Power Switch
etc.
Network Boot supported by Intel PXE