IBM BDM-610000049 Switch User Manual


 
84 CMX158886 cpuModule BDM-610000049 Rev G
Intel 8259 Programmable Interrupt Controller
The chip responsible for handling interrupt requests in the PC is the Intel 8259 Programmable Interrupt
Controller. To use interrupts, you need to know how to read and set the Intel 8259’s interrupt mask register (IMR)
and how to send the end-of-interrupt (EOI) command to the Intel 8259.
Each bit in the IMR contains the mask status of an IRQ line; bit 0 is for IRQ0, bit 1 is for IRQ1, and so on. If a bit is
set (1), then the corresponding IRQ is masked and will not generate an interrupt. If a bit is clear (0), then the
corresponding IRQ is unmasked and can generate interrupts. The IMR is programmed through port 21h.
PCI Interrupts
PCI devices can share interrupts. The BIOS or operating system may assign multiple PCI devices to the same IRQ
line. Any interrupt service routine (ISR) written for PCI devices must be able to handle shared interrupts. Refer
to Interrupt-Driven PC System Design (ISBN: 0-929392-50-7) for more information on PCI interrupts.
Writing an Interrupt Service Routine (ISR)
The first step in adding interrupts to your software is to write the ISR. This is the routine that will automatically
be executed each time an interrupt request occurs on the specified IRQ. An ISR is different than standard
routines that you write. First, on entrance, the processor registers should be pushed onto the stack BEFORE you
do anything else. Second, just before exiting your ISR, you must clear the interrupt status flag and write an
end-of-interrupt command to the Intel 8259 controller. Finally, when exiting the ISR, in addition to popping all
the registers you pushed on entrance, you must use the IRET instruction and not a plain RET. The IRET
automatically pops the flags, CS, and IP that were pushed when the interrupt was called.
Most C compilers allow you to identify a procedure (function) as an interrupt type and will automatically add
these instructions to your ISR, with one important exception: most compilers do not automatically add the
end-of-interrupt command to the procedure; you must do this yourself. Other than this and the few exceptions
discussed below, you can write your ISR just like any other routine. It can call other functions and procedures in
your program and it can access global data. If you are writing your first ISR, RTD recommends focusing on the
basics, such as incrementing a global variable.
Most operating systems have restrictions on what instructions can be called in your ISR. Consult your OS
documentation for details on writing your ISR.
Sample Code
RTD’s drivers provide examples of ISR’s and interrupt handling. Refer to them as working examples. These drivers
were shipped with your cpuModule, but they can also be downloaded from RTD’s website (www.rtd.com).
Note When in APIC mode, the PIC is programmed differently, and IRQ routing behaves differently. For
more information, refer to the APIC datasheets and specifications provided by Intel.
Note A complete explanation of interrupt programming is beyond the scope of this manual. For more
information on interrupts, refer to the Appendix.