Intel PXA27X Manual

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Intel® PXA27x Processor Family Power Requirements

18 Application Note

4.0 Power Controller Interface Signals

The PXA27x processor has an internal power manager unit (PMU) and a set of I/O signals for

communicating with an external power management integrated circuit (PMIC). These signals are

active for initial power up, certain reset events, device on/off events, and transitions between some

operating modes. In addition, two fault signals are required from the PMIC to communicate the

onset of power supply problems to the processor. These signals and their function are described

fully in Section 7.0.

The PXA27x processor communicates to the power controller using the signals defined in Table 8.

Figure 3. Overview of Power Management Operating Modes

Reset Mode

Normal Mode

Idle Mode Sleep Mode

any reset

asserted

reset

de-asserted

Sleep

Wake-up event

Idle

instruction

Standby Mode

Deep Sleep Mode

instruction

Standby

instruction

Wake-up event

Deep Sleep

Interrupt

Wake-up event

instruction OR

(Fault & xIDAE=0)

Fault & xIDAE=0

Fault & xIDAE=0

OR (Fault & xIDAE=1)

OR (Fault & xIDAE=1)

OR (Fault & xIDAE=1)

OR (Fault & xIDAE=1)

Fault & xIDAE=0

Deep Idle Mode

Idle

instruction

Interrupt

OR (Fault & xIDAE=1)

CPDIS=1

CPDIS=0

Fault & xIDAE=0