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18 Intel® PXA27x Processor Family Specification Update
Errata
• If the voltage rise/stabilization time of VCC_USB, VCC_IO, VCC_MEM, VCC_BB,
VCC_LCD, VCC_USIM is longer than 500µsec at room temperature, then the combined
current on VCC_USB, VCC_IO, VCC_MEM, VCC_BB, VCC_LCD, VCC_USIM will be
less than 500mA for less than 20µsec.
• If the voltage rise/stabilization time of VCC_CORE, VCC_SRAM, VCC_PLL is longer than
500µsec at room temperature, then the combined current on VCC_CORE, VCC_SRAM,
VCC_PLL will be less than 100mA for less than 20µsec.
Example of battery life consumption:
— Assume square current spike = 850mA = 0.85Coulomb/sec
— Current drain of the current spike lasting 100µsec
— 0.85 Coulomb/sec * 0.0001 sec = 85 µCoulomb total drain
— Assume 150mA-hr battery = 540 Coulombs
— Calculate current spike percentage of total battery capacity: 85µC / 540C = 1.57 e-7
— Current spike consumes only 0.0000157% of battery capacity.
Implication: High current consumption on processor voltage supply pins can cause external power management
circuitry to enter into an error/shutdown condition.
Workaround: Voltage rise/stabilization time must be determined by the system designer to mitigate any error
condition on external circuitry.
Status: No Fix
E15. LCD: Reconfiguring the LCD controller retains the previous PPL
value for the first line.
Problem: If you program the LCD controller for one configuration, then disable the LCD controller and
program it for another configuration and enable it again, the first line retains the pixels-per-line
(PPL) value from the previous configuration.
For example, configuring the LCD to 320x200 and then disabling it and reconfiguring it to
640x480, and enabling it again, the first line retains the PPL value from the previous configuration,
which is 320.
This issue could effect more than just the first frame, due to the fact that the LCD DMA is
initialized with a size to fit the frame size. Data from the first frame could spill over into the second
frame, and so on.
Implication: If the wrong number of pixels are sent to the LCD panel for the first line of a frame, the display on
the LCD screen could be corrupt.
Workaround: When configuring the LCD the second time, configure it to the desired LCD configuration, enable
the LCD, disable it, and then enable it again, for the third time. This ensures that when the LCD
controller is enabled for the third time, it will begin the frame with the right PPL value.
Status: No Fix
E16. MSHC: Memory Stick does not come out of SLEEP mode after wake
up process.
Problem: The test is trying to put the memory stick to ”SLEEP” and then wake it up by sending the “RESET”
TPC. The manual says that “Memory Stick wakes up and performs a packet processing, when a
packet transfer by SET_CMD TPC or Write_Reg occurs at SL = 1 in Status Register 0”.