Intel PXA27X Computer Hardware User Manual


 
34 Intel® PXA27x Processor Family Specification Update
Errata
Implication: TBD
Workaround: TBD.
Status: Plan Fix
E44. KBD: Keypress wakeup from Standby mode is not reliable
Problem: When the processor is put into Standby mode by correctly configuring the PKWR register, a valid
keypress does not reliably bring the processor out of Standby mode.
The failure rate is less than 10 times out of 100 attempts to wakeup from Standby mode via a key
press.
Implication: TBD
Workaround: Do not put the processor into Standby mode during keypress activity.
Status: No Fix
E45. USBH: USB Host Port 3 in Transceiverless Mode may not work
correctly with an external device.
Problem: The USB Host Port 3, when put into Transceiverless Mode by setting UP3OCR[CFG] = 2, expects
a certain behavior from the attached external device.
While the device is in receive mode, i.e. while USB_P3_2 (OE_n) is deasserted, the Host Port 3
expects the device to transmit a steady state “1” on the USB_P3_6 (VPO) pin and a steady state “0”
on the USB_P3_4 (VMO) pin.
If the device does not comply to this restriction, then please use a 2-input OR gate, with one input
connected to OE_n, the other input connected to VPO from the device, and the output connected to
USB_P3_6 (VPO) of the processor.
The intended silicon fix is as follows:
Remove the "Host Port 2 D+ Pull Up Bypass Enable" section of the Developer’s Manual. The D+
Pull Up Bypass Enable is permanently turned off. In other words, the dynamic D+ pullup resistor is
always enabled as specified by USBOTG.
This bit position, UP2OCR[6], is now UP2OCR[VPMBlockEnbN].
When VPMBlockEnbN = 0b0 (new functionality):
When the USB is in transceiverless mode (UP3OCR[CFG] = 0x2), then USB_P3_6 (VPO)
and USB_P3_4 (VMO) are ignored by USB Host Port 3 when USB_P3_2 (OE_n) is
deasserted.
However, this will cause the following restrictions:
USB Host Port 3 in Transceiverless Mode can only be connected to a fast speed (12Mbps)
device.
The USB device cannot use the common method of indicating a connect by pulling the
VPO line high, or disconnect by pulling both VPO and VMO low. The USB device must
use another method of indicating a connect/disconnect to the Host Port 3, such as using
another GPIO, or performing a read to the external device’s status register.
When VPMBlockEnbN = 0b1 (original functionality):