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16 Intel® PXA27x Processor Family Specification Update
Errata
E8. CORE: JTAG parallel register updates require an extra TCK rising
edge.
Problem: The IEEE 1149.1 spec states that the effects of updating all parallel JTAG registers should be seen
on the falling edge of TCK in the Update-DR state. The XScale core parallel JTAG registers
incorrectly require an extra TCK rising edge to make the update visible. Therefore, operations like
hold-reset, JTAG break, and vector traps require either an extra TCK cycle by going to run-test-idle
or by cycling through the state machine again to trigger the expected hardware behavior.
Implication: TBD
Workaround: If the JTAG interface is polled continuously, this erratum has no effect. If not, an extra TCK cycle
can be caused by going to run-test-idle after writing a parallel JTAG register.
Status: No Fix
E9. MMC: SPI mode – if card is deselected, PROG_DONE will not be set.
Problem: If changing SPI chip selects, the PROG_DONE bit does not get updated with the state of the
selected card.
Implication: If programming card0, then switch to card1, then come back to card0, there is no way of knowing
if card0 ever finished programming.
Workaround: User can switch the MMDAT signal functionality to GPIO functionality and monitor the signal by
reading the GPIO Status register until the signal goes high.
Status: No Fix
E10. MEMC: No MRS command is given when exiting from alternate bus
master mode when SA-1111 address muxing mode is enabled.
Problem: When using alternate bus master with MDCNFG[SA1110x] set, after the alternate bus master has
given the bus back to the processor, if the first access by the processor is a VLIO access, the MRS
commands to switch the SDRAMs back into burst-of-4 mode occurs after a long delay. If SDRAM
is accessed before the MRS command is performed, data returned to the processor registers will not
be valid.
Implication: TBD
Workaround: Use any of the following options to workaround this erratum:
• Do not use SA-1111 address muxing mode with an alternate bus master.
• The alternate bus master can perform the MRS command to put the SDRAM into burst-of-4
mode before de-asserting the MBREQ signal.
Status: No Fix
E11. KBD: Extra keypad matrix interrupt in IMKP mode.
Problem: An unexpected interrupt during keypad-matrix manual scan in ignore-multiple-keypress mode
(IMKP). The test consists of pressing one, single, valid key and holding it down, then pressing a
second, single, valid key and holding it down, then both pressed keys are released simultaneously.
This test results in three vectors to the interrupt-service routine where two are expected.
The first vector to the ISR occurs on first key down. The second vector is unexpected. This is
possibly caused by the second key down. The third vector occurs approximately at the time of all
keys up.
Debounce interval = 3ms, KPC[IMKP] = 1, KPC[ASACT] = 0; KPC[MI] = 1.