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20 Intel® PXA27x Processor Family Specification Update
Errata
Status: Plan Fix
E18. POWER MANAGER: Processor ignores BATT/VCC faults while exiting
sleep mode.
Problem: When asserting nBATT_FAULT or nVCC_FAULT during Sleep mode with the corresponding
IDAE set, and the fault is still present after boot, the part does not enter Deep Sleep. However, if
the IDAE bit is clear, and the fault is still present after boot, the part enters Deep Sleep as expected.
Implication: If a FAULT continues to occur while the processor is exiting Sleep Mode, then the processor is
going to continue to bootup and consume power. There must be enough battery power or the
system must be able to tolerate the fault condition until the workaround below is complete.
Workaround: Before entering sleep or deep sleep via software, first write 1 to the PMCR[IAS] bit to enable
interrupts and then a separate write must be performed to set the desired PMCR[xIDAE] bits.
When the chip exits sleep mode, the interrupt pertaining to Power Management Unit must be
unmasked, ICMR[PWR_I2C] = 0b1, to find out if a fault has occurred. Alternatively, the
PMCR[INTRS] bit can be checked.
Status: No Fix
E19. KBD: Keyboard Edge-Detect Status Register Incorrect After Standby
Mode Wakeup.
Problem: When the processor is in standby mode and it is programmed to wake up by a KeyPad GPIO pulse,
the PKSR (Keyboard Edge detect Status) does not correctly report the GPIO that caused the
Wakeup.
Scenario 1 (Correct):
If only one keypad GPIO is pulsed, and it is programmed to wakeup from standby in PKWR,
the PKSR reports the correct GPIO as the source of the wakeup as expected.
Scenario 2 (Incorrect):
If ALL keypad GPIOs are pulsed but only one is programmed in PKWR to wake up, the PKSR
reports all the GPIOs (except for the ones in use) as the source of the wakeup. This is wrong,
since only one GPIO was programmed to wake up, regardless of the fact that all GPIOs were
pulsed.
Therefore, the following documentation will be added to the Developer’s Manual:
"If any of the PKWR bits are enabled, then only the keypad related to that PKWR will cause a
wakeup. If there is any other activity (active high) on any other keypad pins at this time, then
irrespective of its PKWR setting, it will be registered into the PKSR."
Implication: The user will not be able to detect which keypress woke the processor out of Standby mode.
Workaround: The workaround is to only use PKSR as an indicator that a keypress woke the processor. The user
will not be able to tell which key woke the processor.
Status: No Fix
E20. UART: Character Timeout interrupt remains set under certain
software conditions
Problem: The issue is that randomly the character timeout interrupt does not clear and the DR bit is not set.
The failure was reproduced by adding a software delay loop inside the character timing interrupt
routine between reads from the FIFO. The test continuously repeats and increases the software
delay. After a few iterations, the tests get into a continuous interrupt loop, where the character
timeout interrupt is set, but there is not any data in the FIFO. If the delay loop is placed just outside