Intel PXA27X Computer Hardware User Manual


 
Intel® PXA27x Processor Family Specification Update 11
Summary of Changes
37
CLOCKS: System Hangs when enabling RUN/TURBO
switching at 520MHz
30 X No Fix
38 CLOCKS: System Hangs when enabling HalfTurbo Switching 31 X No Fix
39
MEMC: Memory Controller hangs when entering Self Refresh
Mode.
32 X No Fix
40 SDIO: SDIO Devices Not Working at 19.5 Mbps 32 X Plan Fix
41
AC97: Command Done bit is never set when data is written in
slot12
33 X No Fix
42
SD/MMC: SD/MMC controller CRC errors with some SD/MMC
cards
33 X Plan Fix
43
USBH: There is no Individual Power Sense Polarity bit for each
Host Port. The Power Sense Polarity bit controls the polarity for
all three Host Ports.
33 X Plan Fix
44 KBD: Keypress wakeup from Standby mode is not reliable 34 X No Fix
45
USBH: USB Host Port 3 in Transceiverless Mode may not work
correctly with an external device.
34 X Plan Fix
46
SD/MMC: SPI mode commands fail even on cards that are
compatible with SPI spec 1.0
35 X Plan Fix
47
CLOCKS AND POWER: PWM Clock Enables do not work as
specified
35 X No Fix
48
ICP: Occasionally EIF, EOF and CRC interrupt are missed when
a CRC error is received
36 X No Fix
49
POWER MANAGER: Batt Fault does not always re-enable
GPIO 0 and GPIO 1 as wake-up sources.
36 X No Fix
50
POWER MANAGER: The processor does not exit from Sleep/
Deep-Sleep Mode.
37 X Plan Fix
51
SDIO: CMD53 multiple block data transfer with block count set
to 0 not supported
37 X No Fix
52 LCDC: Disable Done Interrupt does not always occur 38 X No Fix
53
UDC: RCV can not be tied high during UDC transmission when
using an external transceiver
38 X No Fix
54 AC97: AC97 CAR[CAIP] bit field can be incorrectly set 38 X No Fix
Table 4. Summary of Specification Changes
References Status
Number Title Page
NOTE: There are no specification changes at this time.
Table 5. Summary of Specification Clarifications
Number Document Revision Page Status Specification Clarifications
NOTE: There are no specification clarifications at this time.
Table 3. Summary of Errata (Sheet 3 of 3)
References C0 Status
Number Title Page