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4513/4514 Group User’s Manual
HARDWARE
1-33
FUNCTION BLOCK OPERATIONS
(1) Timer control registers
• Timer control register W1
Register W1 controls the count operation of timer 1, the selection
of count start synchronous circuit, and the frequency dividing ra-
tio and count operation of prescaler. Set the contents of this
register through register A with the TW1A instruction. The TAW1
instruction can be used to transfer the contents of register W1 to
register A.
• Timer control register W2
Register W2 controls the count operation and count source of
timer 2. Set the contents of this register through register A with
the TW2A instruction. The TAW2 instruction can be used to trans-
fer the contents of register W2 to register A.
• Timer control register W3
Register W3 controls the count operation and count source of
timer 3 and the selection of count start synchronous circuit. Set
the contents of this register through register A with the TW3A in-
struction. The TAW3 instruction can be used to transfer the
contents of register W3 to register A.
• Timer control register W4
Register W4 controls the count operation and count source of
timer 4. Set the contents of this register through register A with
the TW4A instruction. The TAW4 instruction can be used to trans-
fer the contents of register W4 to register A.
• Timer control register W6
Register W6 controls the D6/CNTR0 pin and D7/CNTR1 func-
tions, the selection and operation of the CNTR0 and CNTR1
output. Set the contents of this register through register A with
the TW6A instruction. The TAW6 instruction can be used to trans-
fer the contents of register W6 to register A.
(2) Precautions
Note the following for the use of timers.
• Prescaler
Stop the prescaler operation to change its frequency dividing ra-
tio.
• Count source
Stop timer 1, 2, 3, or 4 counting to change its count source.
• Reading the count value
Stop timer 1, 2, 3, or 4 counting and then execute the TAB1,
TAB2, TAB3, or TAB4 instruction to read its data.
• Writing to reload registers R1 and R3
When writing data to reload registers R1 or R3 while timer 1 or
timer 3 is operating, avoid a timing when timer 1 or timer 3
underflows.
(3) Prescaler
Prescaler is a frequency divider. Its frequency dividing ratio can be
selected. The count source of prescaler is the instruction clock.
Use the bit 2 of register W1 to select the prescaler dividing ratio
and the bit 3 to start and stop its operation. Prescaler is initialized,
and the output signal (ORCLK) stops when the bit 3 of register W1
is cleared to “0.”
(4) Timer 1 (interrupt function)
Timer 1 is an 8-bit binary down counter with the timer 1 reload reg-
ister (R1). Data can be set simultaneously in timer 1 and the reload
register (R1) with the T1AB instruction. Data can be written to re-
load register (R1) with the TR1AB instruction.
When writing data to reload register R1 with the TR1AB instruction,
the downcount after the underflow is started from the setting value
of reload register R1.
Timer 1 starts counting after the following process;
➀ set data in timer 1, and
➁ set the bit 1 of register W1 to “1.”
However, P30/INT0 pin input can be used as the start trigger for
timer 1 count operation by setting the bit 0 of register W1 to “1.”
When a value set in timer 1 is n, timer 1 divides the count source
signal by n + 1 (n = 0 to 255).
Once count is started, when timer 1 underflows (the next count
pulse is input after the contents of timer 1 becomes “0”), the timer
1 interrupt request flag (T1F) is set to “1,” new data is loaded from
reload register R1, and count continues (auto-reload function).
Data can be read from timer 1 with the TAB1 instruction. When
reading the data, stop the counter and then execute the TAB1 in-
struction. Timer 1 underflow signal divided by 2 can be output from
D6/CNTR0 pin.
(5) Timer 2 (interrupt function)
Timer 2 is an 8-bit binary down counter with the timer 2 reload reg-
ister (R2). Data can be set simultaneously in timer 2 and the reload
register (R2) with the T2AB instruction.
Timer 2 starts counting after the following process;
➀ set data in timer 2,
➁ select the count source with the bits 0 and 1 of register W2, and
➂ set the bit 3 of register W2 to “1.”
When a value set in timer 2 is n, timer 2 divides the count source
signal by n + 1 (n = 0 to 255).
Once count is started, when timer 2 underflows (the next count
pulse is input after the contents of timer 2 becomes “0”), the timer
2 interrupt request flag (T2F) is set to “1,” new data is loaded from
reload register R2, and count continues (auto-reload function).
Data can be read from timer 2 with the TAB2 instruction. When
reading the data, stop the counter and then execute the TAB2 in-
struction. The output from D6/CNTR0 pin by timer 2 underflow
signal divided by 2 can be controlled.