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Major Chips Description 2-39
Table 2-9 M7101 PCI Interface Lock Register
Action I/O Port
0178h/0078h
I/O Port 017Ah/007Ah
Lock Read not available
except offset
0D1h
not available except offset 0D1h
Lock Write not available
except offset
0D1h
not available except offset 0D1h
Unlock
Read
available available
Unlock
Write
available available
State Machine for PCI Interface.
FRAMEJ='1'
IDLE
nocycle='1', when FRAMEJ='1' and IRDYJ='1'.
='0', when others.
HIT='1', when read/write port 178-17B.
='0', when others.
FRAMEJ='1'
FRAMEJ='0'
IRDYJ='0'
IRDYJ='1'
HIT='0'
nocycle='0' and
nocycle='0' and
HIT='1'
HIT='0' and
FRAMEJ='1'
nocycle='1' or
FRAMEJ='0'
BUS_BUSY
TURN_AR
OVER_S
HITCMD3
HITCMD2
HITCMD
1
START_S
Figure 2-8 State Machine for PCI Interface