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OS6624/6648 Architecture
OmniSwitch Troubleshooting Guide September 2005 page -47
Address Learning
Address Learning in the IXE2424 is performed primarily in the software. The hardware provides a CAM
interface to facilitate fast learning of addresses.
On power-up, the switch does not know which addresses are associated with which ports. So, when the
switch receives the first packet, the source address lookup fails. This packet is considered source and
destination address unresolved and is sent to the CPU for address learning. The CPU is interrupted indicat-
ing that an unknown address has been received.
The Address Resolution task that is provided as a part of the driver registers for such an event with the
event manager. This task wakes up, processes the unknown address and creates an entry for the address.
An event is then sent through the Event Manager and wakes up the Configuration Management task. The
configuration task goes through the list of rules and if the address matches any of the configured rules,
those rules are applied to the new learned address.
For destination unresolved packets, the packet is broadcast on all other ports within the VLAN and a desti-
nation unresolved entry is sent to the CPU. The destination (if one exists) receives the packet and responds
back. The driver then learns the destination. All future packets are then forwarded in hardware with no
software intervention.
If the source address was unknown, an unresolved entry is sent to the CPU and depending on whether or
not the destination was resolved or unresolved (or was a broadcast), the packet is sent to the destination
port (if the packet was resolved) or flooded within the VLAN (if the destination was unknown or the
packet was a broadcast packet). The IXE2424 provides the option to turn off such forwarding and the
driver provides an API to do this.
Location of Address Tables
The IXE2424 has two modes of operation - Normal Mode and Low Cost Layer 2 Mode. The locations of
address tables are different for the two modes. In Normal Mode, Layer 4 Record Entries and 12 Last
Address Record Entries are stored on-chip. The rest of the data structures are stored in off-chip address
memory. In Low Cost Layer 2 Mode of operation, there is no external address memory used. All data
structures are contained on-chip.
For the Hawk, we will use the Normal mode with External Address memory.