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5-6
Data Available (*)
X Flag
Ack Data Req
Printer Busy
Host Busy
(from CPU)
Printer Clock
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Data bit 0
Data bit 1
Data bit 2
Data bit 3
1284 Active
(from CPU)
* Data Available is assigned for the cable.
Compatible mode (data transfer from host to printer)
T2T1 T3 T5 T6
T4
Data 1 to 8
Data Strobe
Busy
T1, T2, T3 > 1 µs
T4 < 1 µs
Acknowledge
0 µs ≤ T5 < 3 µs
2 µs < T6 < 6 µs
Reverse data transfer phase in nibble mode (data transfer from printer to host)
Figure 5.5 Data transmission timing