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C141-E090-01EN5 - 64
At command issuance (I/O registers setting contents)
1F7
H
(CM) 1 1 1 1 1 0 0 1
1F6
H
(DH)
×
L
×
DV Max head/LBA [MSB]
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
Max. cylinder [MSB]/Max. LBA
Max. cylinder [LSB]/Max. LBA
Max. sector/Max. LBA [LSB]
1F2
H
(SC) xx VV
1F1
H
(FR) xx
At command completion (I/O registers contents to be read)
1F7
H
(ST) Status information
1F6
H
(DH)
× × ×
DV Max head/LBA [MSB]
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
Max. cylinder [MSB]/Max. LBA
Max. cylinder [LSB]/Max. LBA
Max. sector/Max. LBA [LSB]
1F2
H
(SC) xx
1F1
H
(ER) Error information
(37) READ NATIVE MAX ADDRESS (F8)
This command posts the maximum address intrinsic to the device, which can be set by the
SET MAX ADDRESS command. Upon receipt of this command, the device sets the BSY bit
and indicates the maximum address in the DH, CH, CL and SN registers. Then, it clears BSY
and generates an interrupt.
At command issuance (I/O registers setting contents)
1F7
H
(CM) 1 1 1 1 1 0 0 0
1F6
H
(DH)
×
L
×
DV xx
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(FR)
xx
xx
xx
xx
xx