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Chapter 1
Introduction
Detailed hp rp7405/rp7410 Description
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Figure 1-9 I/O Subsystem Architecture
The server supports two internal SBAs. The SBAs generate 32 rope busses (16 per SBA). The 32 available
internal rope busses are divided in the following manner:
• Two ropes are routed as single rope bundles to support PCI-2x Turbo (264 MB/sec. bandwidth, 64-bit
transfers at 33 MHz) for the MP Core I/O boards for SCSI/LAN.
• Two ropes are routed as single rope bundles to two LBAs to support two slots operating at PCI-2x for
MP/SCSI.
• The remaining 28 ropes are bundled in two rope pairs to 14 LBAs to support 14 slots operating at PCI-4x
(528 MB/sec., 64-bit transfers at 66 MHz).
The hp rp7405/rp7410 uses Hewlett-Packard’s proprietary adaptive signaling concept, also known as the
Universal PCI slot concept (not to be confused with the Universal PCI card). Circuitry on the backplane
senses a standard connector, keyed for 5V, to determine the type of the cards inserted. The circuitry controls
the voltage rail supplied to the connector for powering the card’s I/O pads, VIO. The card can either be of the
5V only, or universal type. 5V only cards require VIO to be 5V, whereas universal cards operate 5V as well as
3.3V. To take advantage of the 66-MHz potential of universal cards, one must operate those cards at 3.3V. The
control circuitry on the backplane, therefore, provides 5V to the slot when a 5V-only card is present, or 3.3V
when a universal card is present. Firmware controls the setting of the slot’s clock rate.