IBM SC34-6814-04 Server User Manual


 
v Optional error processors for 3270 or interactive logical units. A node error
program cannot be generated with both 3270 and interactive logical unit error
processors.
The components are described in the sections that follow.
Entry section
On entry, the sample NEP uses DFHEIENT to establish base registers and
addressability to the EXEC interface. It uses an EXEC CICS LOAD PROGRAM
command to establish addressability to the node error table (NET) and, if included,
the common subroutine vector table (CSVT). It uses an EXEC CICS ADDRESS
COMMAREA command to obtain addressability to the communication area passed
by DFHZNAC, and an EXEC CICS ADDRESS EIB command to obtain
addressability to the EXEC interface block. If time support has been generated, the
error is time-stamped for subsequent processing.
Routing mechanism
The routing mechanism invokes the appropriate error processor depending on the
error code provided by the node abnormal condition program.
Groups of one or more error codes are defined in the DFHSNEP macro (see
below). Each group is associated with an index (in the range X'01' through X'FF')
and an error processor. A translate table is generated and the group index is placed
at the appropriate offset for each error code. Error codes not defined in groups
have a zero value in the table. An error processor vector table (EPVT) contains the
addresses of the error group processors, positioned according to their indexes. The
vector table extends up to the maximum index defined; undefined intermediate
values are represented by zero addresses.
The error code is translated to obtain the error group index. A zero value causes
the node error program to take no further action; otherwise the index is used to
obtain the address of the appropriate error processor from the EPVT. A zero
address causes the node error program to take no further action; otherwise a call is
made to the error processor. This is entered with direct addressability to the NET
and CSVT areas. When the error processor has been executed, the node error
program returns control to the node abnormal condition program.
Node error table
The node error program may use a node error table (NET) that comprises the node
error blocks (NEBs) used to maintain error status information for individual nodes
(see Figure 34 on page 498). Some or all of the NEBs can be permanently
reserved for specific nodes; others are dynamically assigned to nodes when errors
occur. Dynamically assigned NEBs are used exclusively for the nodes to which they
are assigned until they are explicitly released. All the NEBs have an identical
structure of error status blocks (ESBs). Each ESB is reserved for one error
processor and associated with it by means of the appropriate error group index.
The ESB length and format can be customized to the particular error processor that
it serves.
Chapter 9. Writing a node error program 497