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BIOS Intel® Server Board SDS2
Revision 1.2
Order Number: A85874-002
36
• OEM customization
• PCI and Plug and Play (PnP) BIOS interface
• Console redirection
• Resource allocation support
6.2 BIOS Error Handling
This section defines how errors are handled by the system BIOS on the SDS2 server board.
Also discussed are the role of BIOS in error handling, and the interaction between the BIOS,
platform hardware, and server management firmware with regard to error handling. In addition,
error-logging techniques are described and beep codes for errors are defined.
6.2.1 Error Sources and Types
One of the major requirements of server management is to correctly and consistently handles
system errors. System errors, which can be disabled and enabled individually or as a group, can
be categorized as follows:
• PCI bus
• Memory correctable- and uncorrectable errors
• Sensors
• Processor internal error, bus/address error, thermal trip error, temperatures and
voltages, and GTL voltage levels
The BMC manages the sensors. It is capable of receiving event messages from individual
sensors and logging system events.
6.2.2 Handling and Logging System Errors
This section describes actions taken by the SMI handler with respect to the various categories of
system errors. It covers the events logged by the BIOS and the format of data bytes associated
with those events. The BIOS is responsible for monitoring and logging certain system events.
The BIOS sends a platform event message to BMC to log the event. Some of the errors, such
as processor failure, are logged during early POST and not through the SMI handler.
6.2.2.1 Logging Format Conventions
The BIOS complies with the Intelligent Platform Management Interface Specification, Revision
1.5. The BIOS always uses system software ID within the range 00h-1Fh to log errors. As a
result, the Generator ID byte is an odd number in the range 01h-3fh. OEM user binary should use
software IDs of 1. The Software ID allows external software to find the origin of the event
message.