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1: Introduction
ARM720T CORE CPU MANUAL EPSON 1-3
The functional signals on the ARM720T processor are shown in Figure 1-2.
Figure 1-2 ARM720T processor functional signals
1.1.1 EmbeddedICE-RT logic
The EmbeddedICE-RT logic provides integrated on-chip debug support for the ARM720T core.
It enables you to program the conditions under which a breakpoint or watchpoint can occur.
The EmbeddedICE-RT logic is an enhanced implementation of EmbeddedICE, and enables
you to perform debugging in monitor mode. In monitor mode, the core takes an exception on a
breakpoint or watchpoint, rather than entering debug state as it does in halt mode.
If the core does not enter debug state when it encounters a watchpoint or breakpoint, it can
continue to service hardware interrupt requests as normal. Debugging in monitor mode is
useful if the core forms part of the feedback loop of a mechanical system, where stopping the
core can potentially lead to system failure.
The EmbeddedICE-RT logic contains a
Debug Communications Channel
(DCC). The DCC is
used to pass information between the target and the host debugger. The EmbeddedICE-RT
logic is controlled through the
Joint Test Action Group
(JTAG) test access port.
ARM720T processor
HADDR[31:0]
EXTCPDBE
CPnMREQ
CPnTRANS
CPTBIT
CPnOPC
CPnCPI
EXTCPB
EXTCPA
EXTCPDOUT[31:0]
EXTCPDIN[ 31:0]
EXTCPCLKEN
HRESETn
HCLKEN
HLOCK
HBUSREQ
HRDATA[31:0]
HWDATA[31:0]
HCLK
HRESP[1:0]
HREADY
HGRANT
HPROT[3:0]
HSIZE[2:0]
HWRITE
HBURST[2:0]
HTRANS[1:0]
DBGBREAK
DBGRNG[1:0]
DBGEXT[1:0]
DBGRQ
DBGEN
DBGACK
COMMTX
COMMRX
nFIQ
BIGENDOUT
VINITHI
nIRQ
DBGCAPTURE
DBGTAPSM[3:0]
DBGSDOUT
DBGSDIN
DBGSREG[3:0]
DBGIR[3:0]
DBGSHIFT
DBGUPDATE
DBGnTDOEN
DBGEXTEST
DBGINTEST
DBGTMS
DBGTDO
DBGTDI
DBGTCKEN
DBGnTRST
ETM CPB
ETM CPA
ETMABORT
ETM WDA TA [31:0]
ETMRDATA[31:0]
ETMDBGACK
ETM SIZ E[1:0]
ETM CLKEN
ETM n RW
ETM ADDR[31:0]
ETM n CPI
ETMINSTRVALID
ETM n EXEC
ETM SEQ
ETM n OPC
ETM n M REQ
ETM HIV ECS
ETM BIGEND
ETM EN
ETM T BIT
ETM PROCID[31:0]
ETMPROCIDWR
SCANIN0 - SCANIN6
SCANOUT0 - SCANOUT6
TESTENABLE
SCANENABLE
AMBA
interface
Coprocessor
interface
Debug
interface
Miscellaneous
signals
ATPG
Signals
JTAG
interface
ETM interface
ATPG
Signals