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U41243-J-Z156-1-76 57
Configuration software and utilities BIOS Setup
5.3.4.2 PCI Mode submenu
PCI Slot 5 Selects PCI Mode Submenu for this PCI slot.
PCI Slot 6 Selects PCI Mode Submenu for this PCI slot.
PCI Slot 7 Selects PCI Mode Submenu for this PCI slot.
PCI Slot 8 Selects PCI Mode Submenu for this PCI slot.
PCI Slot 9 Selects PCI Mode Submenu for this PCI slot.
PCI Slot 10 Selects PCI Mode Submenu for this PCI slot.
Menu item Option Description
Option ROM scan Disabled
Enabled
Enables the ROM scan option.
Enable Master Disabled
Enabled
Enables the LVDS controller as the PCI bus
master.
Latency Timer Default
0020h
0040h
0060h
0080h
00A0h
00C0h
00E0h
Specifies the minimum number of PCI bus
clocks that the controller can master on a PCI
bus during one transaction.
Table 13: PCI mode options
Menu item Option Description
Table 12: PCI configuration options