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Intel
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31154 133 MHz PCI Bridge Design Guide Design Guide 35
Routing Guidelines
Routing Guidelines 6
This chapter provides some basic routing guidelines for layout and design of a printed circuit board
(PCB) using the Intel
®
31154 133 MHz PCI Bridge. The high-speed clocking required when
designing with the 31154 requires special attention to signal integrity. In fact, it is highly
recommended that the board design be simulated to determine optimum layout for signal integrity.
The information in this chapter provides guidelines to aid the designer with board layout. Several
factors influence the signal integrity of a 31154 design, including the following:
• Power distribution
• Decoupling
• Minimizing crosstalk
• Layout considerations when routing the PCI-X bus interfaces
The order in which signals are routed varies from designer to designer. Some designers prefer to
route all clock signals first, while others prefer to route all high-speed bus signals first. Either order
can be used, provided the guidelines listed here are followed.