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114 Intel
®
41210 Serial to Parallel PCI Bridge Developer’s Manual
Register Description
2RWCS 0b
PCI-X Detected Target Abort Mask: (optional in specification)
0 = Not masked
1 = Masked
1RWCS 0b
PCI-X Detected Split Completion Master Abort Mask:
0 = Not masked
1 = Masked
0RWCS 0b
PCI-X Detected Split Completion Target Abort Mask: (optional in specification)
0 = Not masked
1 = Masked
Table 94. Offset 130h: PCIXERRUNC_MSK—Uncorrectable PCI-X Error Mask Register
(Sheet 2 of 2)
Bits Type Reset Description