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2.5.3TransmitandReceiveEMACInterrupts
PeripheralArchitecture
TheEMACprocessesdescriptorsinlinkedlistchainsasdiscussedinSection2.5.1,usingthelinkedlist
queuemechanismdiscussedinSection2.5.2.
TheEMACsynchronizesdescriptorlistprocessingthroughtheuseofinterruptstothesoftware
application.Theinterruptsarecontrolledbytheapplicationusingtheinterruptmasks,globalinterrupt
enable,andthecompletionpointerregister(CP).TheCPisalsocalledtheinterruptacknowledgeregister.
AstheEMACsupportseightchannelsforbothtransmitandreceive,thereareeightcompletionpointer
registersforboth.Theyare:
•TXnCP-TransmitChannelnCompletionPointer(InterruptAcknowledge)Register
•RXnCP-ReceiveChannelnCompletionPointer(InterruptAcknowledge)Register
Theseregistersservetwopurposes.Whenread,theyreturnthepointertothelastdescriptorthatthe
EMAChasprocessed.Whenwrittenbythesoftwareapplication,thevaluerepresentsthelastdescriptor
processedbythesoftwareapplication.Whenthesetwovaluesdonotmatch,theinterruptisactive.
ThesystemconfigurationdetermineswhetherornotanactiveinterruptactuallyinterruptstheCPU.In
general,theglobalinterruptforEMACandMDIOmustbeenabledintheEMACcontrolmodule,andit
alsomustbemappedintheDSPinterruptcontrollerandenabledasaCPUinterrupt.Ifthesystemis
configuredproperly,theinterruptforaspecificreceiveortransmitchannelexecutesunderthepreviously
describedconditionswhenthecorrespondinginterruptisenabledintheEMACusingthereceiveinterrupt
masksetregister(RXINTMASKSET)orthetransmitinterruptmasksetregister(TXINTMASKSET).
Whetherornottheinterruptisenabled,thecurrentstateofthereceiveortransmitchannelinterruptcan
beexamineddirectlybythesoftwareapplicationreadingthereceiveinterruptstatus(unmasked)register
(RXINTSTATRAW)andtransmitinterruptstatus(unmasked)register(TXINTSTATRAW).
InterruptsareacknowledgedwhentheapplicationsoftwareupdatesthevalueofTXnCPorRXnCPwitha
valuethatmatchestheinternalvaluekeptbytheEMAC.Thismechanismensuresthattheapplication
softwarenevermissesanEMACinterrupt,sincetheinterruptanditsacknowledgmentaretieddirectlyto
theactualbufferdescriptorsprocessing.
SPRU941A–April2007EthernetMediaAccessController(EMAC)/19
ManagementDataInput/Output(MDIO)
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