Filter
Top Products
www.ti.com
2.14.2HardwareResetConsiderations
2.15Initialization
2.15.1EnablingtheEMAC/MDIOPeripheral
2.15.2EMACControlModuleInitialization
PeripheralArchitecture
Whenahardwareresetoccurs,theEMACperipheralhasitsregistervaluesresetandallthecomponents
returntotheirdefaultstate.Afterthehardwarereset,theEMACneedstobeinitializedbeforebeingable
toresumeitsdatatransmission,asdescribedinSection2.15.
Ahardwareresetistheonlymeansofrecoveringfromtheerrorinterrupts(HOSTPEND),whichare
triggeredbyerrorsinpacketbufferdescriptors.Beforedoingahardwarereset,youshouldinspectthe
errorcodesintheMACstatusregister(MACSTATUS)thatgivesinformationaboutthetypeofsoftware
errorthatneedstobecorrected.Fordetailedinformationonerrorinterrupts,seeSection2.16.1.4.
Whenthedeviceispoweredon,theEMACperipheralisinadisabledstate.BeforeanyEMACspecific
initializationcantakeplace,theEMACneedstobeenabled;otherwise,itsregisterscannotbewrittenand
thereadswillallreturnavalueofzero.
TheEMAC/MDIOisenabledthroughthePowerandSleepController(PSC)registers.Forinformationon
howtoenabletheEMACperipheralfromthePowerandSleepController,seetheTMS320DM643xDMP
DSPSubsystemReferenceGuide(SPRU978).
Whenfirstenabled,theEMACperipheralregistersaresettotheirdefaultvalues.Afterenablingthe
peripheral,youmayproceedwiththemodulespecificinitialization.
TheEMACcontrolmoduleisusedforglobalinterruptenable,andtopaceback-to-backinterruptsusing
aninterruptretriggercountbasedontheperipheralclock(PLL1/6).Thereisalsoan8KblockofRAMlocal
totheEMACthatisusedtoholdpacketbufferdescriptors.
NotethatalthoughtheEMACcontrolmoduleandtheEMACmodulehaveslightlydifferentfunctions,in
practice,thetypeofmaintenanceperformedontheEMACcontrolmoduleismorecommonlyconducted
fromtheEMACmodulesoftware(asopposedtotheMDIOmodule).
TheinitializationoftheEMACcontrolmoduleconsistsoftwoparts:
1.ConfigurationoftheinterrupttotheCPU.
2.InitializationoftheEMACcontrolmodule:
•SettingtheinterruptpacecountusingtheEMACcontrolmoduleinterrupttimercountregister
(EWINTTCNT).
•InitializingtheEMACandMDIOmodules.
•EnablinginterruptsintheEMACcontrolmoduleusingtheEMACcontrolmoduleinterruptcontrol
register(EWCTL).
Whenusingtheregister-levelCSL,thecodetoperformtheactionsassociatedwiththesecondpartmay
appearasinExample4.
TheprocessofmappingtheEMACinterruptstooneoftheCPU’sinterruptsisdoneusingtheDSP
interruptcontroller.OncetheinterruptismappedtoaCPUinterrupt,generalmaskingandunmaskingof
theinterrupt(tocontrolreentrancy)shouldbedoneatthechiplevelbymanipulatingtheinterruptenable
mask.TheEMACcontrolmoduleinterruptcontrolregister(EWCTL)shouldonlybeusedtoenableand
disableinterruptsfromwithintheEMACinterruptserviceroutine(ISR).Thisisbecausedisablingand
reenablingtheinterruptinEWCTLalsoresetstheinterruptpacecounter.
EthernetMediaAccessController(EMAC)/ 46SPRU941A–April2007
ManagementDataInput/Output(MDIO)
SubmitDocumentationFeedback