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4.11MDIOUserAccessRegister0(USERACCESS0)
MDIORegisters
TheMDIOuseraccessregister0(USERACCESS0)isshowninFigure23anddescribedinTable21.
Figure23.MDIOUserAccessRegister0(USERACCESS0)
313029282625212016
GOWRITEACKReservedREGADRPHYADR
R/WS-0R/W-0R/W-0R-0R/W-0R/W-0
150
DATA
R/W-0
LEGEND:R=Readonly;R/W=Read/Write;WS=Write1toset;-n=valueafterreset
Table21.MDIOUserAccessRegister0(USERACCESS0)FieldDescriptions
BitFieldValueDescription
31GO0-1Gobit.Writinga1tothisbitcausestheMDIOstatemachinetoperformanMDIOaccesswhenit
isconvenientforittodoso;thisisnotaninstantaneousprocess.Writinga0tothisbithasno
effect.ThisbitiswriteableonlyiftheMDIOstatemachineisenabled.Thisbitwillselfclearwhen
therequestedaccesshasbeencompleted.AnywritestoUSERACCESS0areblockedwhenthe
GObitis1.
30WRITEWriteenablebit.Settingthisbitto1causestheMDIOtransactiontobearegisterwrite;otherwise,
itisaregisterread.
0Theusercommandisareadoperation.
1Theusercommandisawriteoperation.
29ACK0-1Acknowledgebit.ThisbitissetifthePHYacknowledgedthereadtransaction.
28-26Reserved0Reserved
25-21REGADR0-1FhRegisteraddressbits.ThisfieldspecifiesthePHYregistertobeaccessedforthistransaction
20-16PHYADR0-1FhPHYaddressbits.ThisfieldspecifiesthePHYtobeaccessedforthistransaction.
15-0DATA0-FFFFhUserdatabits.ThesebitsspecifythedatavaluereadfromortobewrittentothespecifiedPHY
register.
64EthernetMediaAccessController(EMAC)/SPRU941A–April2007
ManagementDataInput/Output(MDIO)
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