Texas Instruments TMS320DM643x DMP Switch User Manual


 
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2.6.3InterruptControl
2.7MDIOModule
2.7.1MDIOModuleComponents
PeripheralArchitecture
TheEMACcontrolmodulecombinesmultipleinterruptconditionsgeneratedbytheEMACandMDIO
modulesintoasingleinterruptsignalthatismappedtoaCPUinterruptviatheCPUinterruptcontroller.
ThecontrolmoduleusestworegisterstocontroltheinterruptsignaltotheCPU:
TheINTENbitintheEMACcontrolmoduleinterruptcontrolregister(EWCTL)globallyenablesand
disablestheinterruptsignaltotheCPU.TheINTENbitisusedtodrivetheinterruptlinelowduring
interruptprocessingsothatuponreenablingthebit,theinterruptsignalwillriseifanotherinterrupt
conditionexists;thus,creatingarisingedgedetectablebytheCPU.
TheEMACcontrolmoduleinterrupttimercountregister(EWINTTCNT)isprogrammedwithavalue
(EWINTTCNT)thatcountsdownonceEMAC/MDIOinterruptsareenabledusingEWCTL.TheCPU
interruptsignalispreventedfromrisingagainuntilthiscountreaches0.
EWINTTCNThasnoeffectoninterruptsoncethecountreaches0,sothereisnoinducedinterruptlatency
onrandomsporadicinterrupts.However,thecountdelaystheissuanceofasecondinterruptimmediately
afterafirst.Thisprotectsthesystemfromgettingintoaninterruptthrashingmodewherethesoftware
interruptserviceroutine(ISR)completesprocessingjustintimetogetanotherinterrupt.Bypostponing
subsequentinterruptsinaback-to-backcondition,thesoftwareapplicationordrivercangetmorework
doneinitsISR.
EWINTTCNTresetvaluecanbeadjustedfromwithintheISRaccordingtocurrentsystemload,orsimply
settoafixedvaluethatassuresamaximumnumberofinterruptspersecond.
ThecountercountsattheperipheralclockfrequencyofPLL1/6;itsdefaultresetcountis0(inactive),its
maximumvalueis1FFFFh(131071).
TheMDIOmoduleisusedtomanageupto32physicallayer(PHY)devicesconnectedtotheEthernet
MediaAccessController(EMAC).TheDM643xdevicesupportsasinglePHYbeingconnectedtothe
EMACatanygiventime.TheMDIOmoduleisdesignedtoallowalmosttransparentoperationofthe
MDIOinterfacewithlittlemaintenancefromtheCPU.
TheMDIOmodulecontinuouslypolls32MDIOaddressesinordertoenumerateallPHYdevicesinthe
system.OnceaPHYdevicehasbeendetected,theMDIOmodulereadstheMDIOPHYlinkstatus
register(LINK)tomonitorthePHYlinkstate.LinkchangeeventsarestoredintheMDIOmodule,which
caninterrupttheCPU.ThisstoringoftheeventsallowstheCPUtopollthelinkstatusofthePHYdevice
withoutcontinuouslyperformingMDIOmoduleaccesses.However,whentheCPUmustaccesstheMDIO
moduleforconfigurationandnegotiation,theMDIOmoduleperformstheMDIOreadorwriteoperation
independentoftheCPU.Thisindependentoperationallowstheprocessortopollforcompletionor
interrupttheCPUoncetheoperationhascompleted.
TheMDIOmodule(Figure9)interfacestothePHYcomponentsthroughtwoMDIOpins(MDCLKand
MDIO),andtotheCPUthroughtheEMACcontrolmoduleandtheconfigurationbus.TheMDIOmodule
consistsofthefollowinglogicalcomponents:
MDIOclockgenerator
GlobalPHYdetectionandlinkstatemonitoring
ActivePHYmonitoring
PHYregisteruseraccess
28EthernetMediaAccessController(EMAC)/SPRU941AApril2007
ManagementDataInput/Output(MDIO)
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