Texas Instruments TMS320DM643x DMP Switch User Manual


 
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2.9.2DataTransmission
2.9.2.1TransmitControl
2.9.2.2CRCInsertion
2.9.2.3AdaptivePerformanceOptimization(APO)
2.9.2.4Interpacket-Gap(IPG)Enforcement
2.9.2.5BackOff
PeripheralArchitecture
TheEMACpassesdatatothePHYfromthetransmitFIFO(whenenabled).Dataissynchronizedtothe
transmitclockrate.TransmissionbeginswhenthereareTXCELLTHRESHcellsof64byteseach,ora
completepacket,intheFIFO.
Ajamsequenceisoutputifacollisionisdetectedonatransmitpacket.Ifthecollisionwaslate(afterthe
first64byteshavebeentransmitted),thecollisionisignored.Ifthecollisionisnotlate,thecontrollerwill
backoffbeforeretryingtheframetransmission.Whenoperatinginfull-duplexmode,thecarriersense
(MCRS)andcollision-sensing(MCOL)modesaredisabled.
IftheSOPbufferdescriptorPASSCRCflagiscleared,theEMACgeneratesandappendsa32-bit
EthernetCRContothetransmitteddata.FortheEMAC-generatedCRCcase,aCRC(orplaceholder)at
theendofthedataisallowedbutnotrequired.ThebufferbytecountvalueshouldnotincludetheCRC
bytes,iftheyarepresent.
IftheSOPbufferdescriptorPASSCRCflagisset,thenthelastfourbytesofthetransmitdataare
transmittedastheframeCRC.ThefourCRCdatabytesshouldbethelastfourbytesoftheframeand
shouldbeincludedinthebufferbytecountvalue.TheMACperformsnoerrorcheckingontheoutgoing
CRC.
TheEMACincorporatesadaptiveperformanceoptimization(APO)logicthatmaybeenabledbysetting
theTXPACEbitintheMACcontrolregister(MACCONTROL).Transmissionpacingtoenhance
performanceisenabledwhentheTXPACEbitisset.Adaptiveperformancepacingintroducesdelaysinto
thenormaltransmissionofframes,delayingtransmissionattemptsbetweenstations,reducingthe
probabilityofcollisionsoccurringduringheavytraffic(asindicatedbyframedeferralsandcollisions),
thereby,increasingthechanceofsuccessfultransmission.
Whenaframeisdeferred,suffersasinglecollision,multiplecollisions,orexcessivecollisions,thepacing
counterisloadedwithaninitialvalueof31.Whenaframeistransmittedsuccessfully(without
experiencingadeferral,singlecollision,multiplecollision,orexcessivecollision),thepacingcounteris
decrementedby1,downto0.
Withpacingenabled,anewframeispermittedtoimmediately(afteroneinterpacketgap)attempt
transmissiononlyifthepacingcounteris0.Ifthepacingcounterisnonzero,theframeisdelayedbythe
pacingdelayofapproximatelyfourinterpacketgap(IPG)delays.APOonlyaffectstheIPGprecedingthe
firstattemptattransmittingaframe;APOdoesnotaffecttheback-offalgorithmforretransmittedframes.
ThemeasurementreferencefortheIPGof96bittimesischangeddependingonframetrafficconditions.
IfaframeissuccessfullytransmittedwithoutcollisionandMCRSisdeassertedwithinapproximately48bit
timesofMTXENbeingdeasserted,then96bittimesismeasuredfromMTXEN.Iftheframesuffereda
collisionorMCRSisnotdeasserteduntilmorethanapproximately48bittimesafterMTXENis
deasserted,then96bittimes(approximately,butnotless)ismeasuredfromMCRS.
TheEMACimplementsthe802.3binaryexponentialback-offalgorithm.
SPRU941AApril2007EthernetMediaAccessController(EMAC)/37
ManagementDataInput/Output(MDIO)
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