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5.21ReceiveUnicastEnableSetRegister(RXUNICASTSET)
EthernetMediaAccessController(EMAC)Registers
Thereceiveunicastenablesetregister(RXUNICASTSET)isshowninFigure47anddescribedin
Table46.
Figure47.ReceiveUnicastEnableSetRegister(RXUNICASTSET)
3116
Reserved
R-0
158
Reserved
R-0
76543210
RXCH7ENRXCH6ENRXCH5ENRXCH4ENRXCH3ENRXCH2ENRXCH1ENRXCH0EN
R/WS-0R/WS-0R/WS-0R/WS-0R/WS-0R/WS-0R/WS-0R/WS-0
LEGEND:R=Readonly;R/W=Read/Write;WS=Write1toset,writeof0hasnoeffect;-n=valueafterreset
Table46.ReceiveUnicastEnableSetRegister(RXUNICASTSET)FieldDescriptions
BitFieldValueDescription
31-8Reserved0Reserved
7RXCH7EN0-1Receivechannel7unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
6RXCH6EN0-1Receivechannel6unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
5RXCH5EN0-1Receivechannel5unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
4RXCH4EN0-1Receivechannel4unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
3RXCH3EN0-1Receivechannel3unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
2RXCH2EN0-1Receivechannel2unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
1RXCH1EN0-1Receivechannel1unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
0RXCH0EN0-1Receivechannel0unicastenablesetbit.Write1tosettheenable,awriteof0hasnoeffect.
Mayberead.
SPRU941A–April2007EthernetMediaAccessController(EMAC)/89
ManagementDataInput/Output(MDIO)
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