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EthernetMediaAccessController(EMAC)Registers
Table25.EthernetMediaAccessController(EMAC)Registers(continued)
OffsetAcronymRegisterDescriptionSection
168hEMCONTROLEmulationControlRegisterSection5.30
16ChFIFOCONTROLFIFOControlRegisterSection5.31
170hMACCONFIGMACConfigurationRegisterSection5.32
174hSOFTRESETSoftResetRegisterSection5.33
1D0hMACSRCADDRLOMACSourceAddressLowBytesRegisterSection5.34
1D4hMACSRCADDRHIMACSourceAddressHighBytesRegisterSection5.35
1D8hMACHASH1MACHashAddressRegister1Section5.36
1DChMACHASH2MACHashAddressRegister2Section5.37
1E0hBOFFTESTBackOffTestRegisterSection5.38
1E4hTPACETESTTransmitPacingAlgorithmTestRegisterSection5.39
1E8hRXPAUSEReceivePauseTimerRegisterSection5.40
1EChTXPAUSETransmitPauseTimerRegisterSection5.41
500hMACADDRLOMACAddressLowBytesRegister,UsedinReceiveAddressMatchingSection5.42
504hMACADDRHIMACAddressHighBytesRegister,UsedinReceiveAddressMatchingSection5.43
508hMACINDEXMACIndexRegisterSection5.44
600hTX0HDPTransmitChannel0DMAHeadDescriptorPointerRegisterSection5.45
604hTX1HDPTransmitChannel1DMAHeadDescriptorPointerRegisterSection5.45
608hTX2HDPTransmitChannel2DMAHeadDescriptorPointerRegisterSection5.45
60ChTX3HDPTransmitChannel3DMAHeadDescriptorPointerRegisterSection5.45
610hTX4HDPTransmitChannel4DMAHeadDescriptorPointerRegisterSection5.45
614hTX5HDPTransmitChannel5DMAHeadDescriptorPointerRegisterSection5.45
618hTX6HDPTransmitChannel6DMAHeadDescriptorPointerRegisterSection5.45
61ChTX7HDPTransmitChannel7DMAHeadDescriptorPointerRegisterSection5.45
620hRX0HDPReceiveChannel0DMAHeadDescriptorPointerRegisterSection5.46
624hRX1HDPReceiveChannel1DMAHeadDescriptorPointerRegisterSection5.46
628hRX2HDPReceiveChannel2DMAHeadDescriptorPointerRegisterSection5.46
62ChRX3HDPReceiveChannel3DMAHeadDescriptorPointerRegisterSection5.46
630hRX4HDPReceiveChannel4DMAHeadDescriptorPointerRegisterSection5.46
634hRX5HDPReceiveChannel5DMAHeadDescriptorPointerRegisterSection5.46
638hRX6HDPReceiveChannel6DMAHeadDescriptorPointerRegisterSection5.46
63ChRX7HDPReceiveChannel7DMAHeadDescriptorPointerRegisterSection5.46
640hTX0CPTransmitChannel0CompletionPointerRegisterSection5.47
644hTX1CPTransmitChannel1CompletionPointerRegisterSection5.47
648hTX2CPTransmitChannel2CompletionPointerRegisterSection5.47
64ChTX3CPTransmitChannel3CompletionPointerRegisterSection5.47
650hTX4CPTransmitChannel4CompletionPointerRegisterSection5.47
654hTX5CPTransmitChannel5CompletionPointerRegisterSection5.47
658hTX6CPTransmitChannel6CompletionPointerRegisterSection5.47
65ChTX7CPTransmitChannel7CompletionPointerRegisterSection5.47
660hRX0CPReceiveChannel0CompletionPointerRegisterSection5.48
664hRX1CPReceiveChannel1CompletionPointerRegisterSection5.48
668hRX2CPReceiveChannel2CompletionPointerRegisterSection5.48
66ChRX3CPReceiveChannel3CompletionPointerRegisterSection5.48
670hRX4CPReceiveChannel4CompletionPointerRegisterSection5.48
674hRX5CPReceiveChannel5CompletionPointerRegisterSection5.48
678hRX6CPReceiveChannel6CompletionPointerRegisterSection5.48
SPRU941A–April2007EthernetMediaAccessController(EMAC)/69
ManagementDataInput/Output(MDIO)
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