8399
8399
N/B Maintenance
N/B Maintenance
85
AC97 Audio / Modem Interface
Signal Name
Pin # I/O Signal Description
ACRST#
T3 O
AC97 Reset.
ACBTCK
T1 I
AC97 Bit Clock.
ACSYNC
T2 O
AC97 Sync.
ACSDO
U2 O
AC97 Serial Data Out.
ACSDIN0
(VSUS33)ƒ
U3 I
AC97 Serial Data In 0.
ACSDIN1
(VSUS33)ƒ
V2 I
AC97 Serial Data In 1.
ACSDIN2 /
GPIO20 / PCS0#
U1 I AC97 Serial Data In 2. RxE4[6]=0,E5[1]=0, PMIO Rx4C[20]=1
ACSDIN3 /
GPIO21 / PCS1#
/ SLPBTN#
V3 I AC97 Serial Data In 3. RxE4[6]=0,E5[2]=0, PMIO Rx4C[21]=1
Internal Keyboard Controller
Signal Name Pin # I/O PU Signal Description
MSCK / IRQ1
W1 IO / I PU
MultiFunction Pin (Internal mouse controller enabled by
Rx51[1])
Rx51[2]=1 Mouse Clock. From internal mouse controller.
Rx51[2]=0 Interrupt Request 1. Interrupt input 1.
MSDT / IRQ12
W2 IO / I PU
MultiFunction Pin (Internal mouse controller enabled by
Rx51[1])
Rx51[2]=1 Mouse Data. From internal mouse controller.
Rx51[2]=0 Interrupt Request 12. Interrupt input 12.
KBCK / KA20G
W3 IO / I PU
MultiFunction Pin (Internal keyboard controller enabled
by
Rx51[0])
Rx51[0]=1 Keyboard Clock. From internal keyboard
controller
Rx51[0]=0 Gate A20. Input from external keyboard
controller.
KBDT / KBRC
V1 IO / I PU
MultiFunction Pin (Internal keyboard controller enabled
by
Rx51[0])
Rx51[0]=1 Keyboard Data. From internal keyboard
controller.
Rx51[0]=0 Keyboard Reset. From external keyboard
controller
(KBC) for CPURST# generation
KBCS#
/ strap
AF10 O
Keyboard Chip Select
(Rx51[0]=0). To external keyboard
controller chip. Strap high to enable LPC BIOS ROM.
Note: KBCK, KBDT, MSCK, and MSDT are powered by the VSUS33 suspend voltage plane.
Speaker
Signal Name Pin # I/O PU Signal Description
SPKR / strap
AF8 O
Speaker. Strap low to enable (high to disable) CPU
frequency
strapping.
Resets, Clocks, and Power Status
Signal Name Pin # I/O Signal Description
PWRGD AC5 I
Power Good. Connected to the Power Good signal on the
Power Supply. Internal logic
powered by VBAT.
PWROK# AF1 O
Power OK. Internal logic powered by VSUS33.
PCIRST# R1 O
PCI Reset. Active low reset signal for the PCI bus. The
VT8235 Version CE will assert
this pin during power-up or from the control register.
OSC AB8 I
Oscillator. 14.31818 MHz clock signal used by the internal
Timer.
RTCX1 AE4 I
RTC Crystal Input: 32.768 KHz crystal or oscillator
input. This input is used for the
internal RTC and power-well power management logic and
is powered by VBAT.
RTCX2 AF3 O
RTC Crystal Output: 32.768 KHz crystal output. Internal
logic powered by VBAT.
TEST AE9 I Test.
TPO AF9 O
Test Pin Output. Output pin for test mode.
NC (see pin
list)
–
No Connect. Do not connect.
5.3 VIA VT8235CD South Bridge(6)
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