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Rev.2.00 Nov 28, 2005 page 8 of 378
REJ09B0124-0200
M16C/6N Group (M16C/6NK, M16C/6NM) 1. Overview
Under development
This document is under development and its contents are subject to change.
Pin No.
Control
Port
Interrupt
Timer Pin UART Pin
Analog
CAN Module
Bus Control
Pin Pin Pin Pin Pin
(1)
51 P4_1 A17
52 P4_0 A16
53 P3_7 A15
54 P3_6 A14
55 P3_5 A13
56 P3_4 A12
57 P3_3 A11
58 P3_2 A10
59 P3_1 A9
60 VCC2
61 P3_0 A8(/-/D7)
62 VSS
63 P2_7 AN2_7 A7(/D7/D6)
64 P2_6 AN2_6 A6(/D6/D5)
65 P2_5 AN2_5 A5(/D5/D4)
66 P2_4 AN2_4 A4(/D4/D3)
67 P2_3 AN2_3 A3(/D3/D2)
68 P2_2 AN2_2 A2(/D2/D1)
69 P2_1 AN2_1 A1(/D1/D0)
70 P2_0 AN2_0 A0(/D0/-)
71 P1_7
_________
INT5 D15
72 P1_6
_________
INT4 D14
73 P1_5
_________
INT3 D13
74 P1_4 D12
75 P1_3 D11
76 P1_2 D10
77 P1_1 D9
78 P1_0 D8
79 P0_7 AN0_7 D7
80 P0_6 AN0_6 D6
81 P0_5 AN0_5 D5
82 P0_4 AN0_4 D4
83 P0_3 AN0_3 D3
84 P0_2 AN0_2 D2
85 P0_1 AN0_1 D1
86 P0_0 AN0_0 D0
87 P10_7
______
KI3 AN7
88 P10_6
______
KI2 AN6
89 P10_5
______
KI1 AN5
90 P10_4
______
KI0 AN4
91 P10_3 AN3
92 P10_2 AN2
93 P10_1 AN1
94 AVSS
95 P10_0 AN0
96 VREF
97 AVCC
98 P9_7 SIN4
______________
ADTRG
99 P9_6 SOUT4 ANEX1 CTX0
100 P9_5 CLK4 ANEX0 CRX0
Table 1.5 Pin Characteristics for 100-Pin Package (2)
NOTE:
1. Not available the bus control pins in T/V-ver..