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Rev.2.00 Nov 28, 2005 page 272 of 378
REJ09B0124-0200
M16C/6N Group (M16C/6NK, M16C/6NM) 21. Flash Memory Version
Under development
This document is under development and its contents are subject to change.
21.3.4.9 Writing Command and Data
Write commands and data to even addresses in the user ROM area.
21.3.4.10 Wait Mode
When entering wait mode, set the FMR01 bit in the FMR0 register to “0” (CPU rewrite mode disabled)
before executing the WAIT instruction.
21.3.4.11 Stop Mode
When the microcomputer enters stop mode, execute the instruction which sets the CM10 bit to “1” (stop
mode) after setting the FMR01 bit to “0” (CPU rewrite mode disabled) and disabling the DMA transfer.
21.3.4.12 Low Power Dissipation Mode and On-chip Oscillator Low Power Dissipation Mode
If the CM05 bit is set to “1” (main clock stopped), do not execute the following commands:
• Program
• Block erase
• Erase all unlocked blocks
• Lock bit program
• Read lock bit status