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TMS320C6712D
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
8
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
device compatibility
The TMS320C6712 and C6211/C6711 devices are pin-compatible; thus, making new system designs easier
and providing faster time to market. The following list summarizes the device characteristic differences among
the C6211, C6211B, C6711, C6711B, C6711C, C6711D, C6712, C6712C, and C6712D devices:
D The C6211 and C6211B devices have a fixed-point TMS320C62x DSP core (CPU), while the C6711,
C6711B, C6711C, C6711D, C6712, C6712C, and C6712D devices have a floating-point C67x CPU.
D The C6211, C6211B, C6711, C6711B, C6711C, and C6711D devices have a 32-bit EMIF, while the C6712,
C6712C, and C6712D devices have a 16-bit EMIF.
D The C6211, C6211B, C6711, C6711B, C6711C, and C6711D devices feature an HPI, while the C6712,
C6712C, and C6712D devices do not.
D The C6712, C6712C, and C6712D devices have dedicated device configuration pins, BOOTMODE,
LENDIAN, and EMIFBE
(12D only) that specify the boot-load operation and device endianness,
respectively, during reset. On the C6211/C6211B and C6711/C6711B/C6711C/C6711D devices, these
configuration pins are integrated with the HPI pins.
D The C6211/C6211B device runs at -167 and -150 MHz clock speeds (with a C6211BGFNA extended
temperature device that also runs at -150 MHz), while the C6711/C6711B device runs at -150 and -100 MHz
(with a C6711BGFNA extended temperature device that also runs at -100 MHz) and the C6711C/C6711D
device runs at -200 clock speed (with a C6711CGDPA extended temperature device that also runs at -167
MHz). The C6712 device runs at -100 MHz clock speed and the C6712C/C6712D device runs at -150 MHz
clock speed.
D The C6211/C6211B, C6711-100, C6711B and C6712 devices have a core voltage of 1.8 V, the C6711-150
device has a core voltage is 1.9 V, and the C6711C/C6711D and C6712C/C6712D devices operate with
a core voltage of 1.20
†
V.
D There are several enhancements and features that are only available on the C6711C/C6711D and
C6712C/C6712D devices, such as: the CLKOUT3 signal, a software-programmable PLL and PLL
Controller, and a GPIO peripheral module. The C6711D and C6712D devices also have additional
enhancements such as: EMIF Big Endian mode correctness EMIFBE
and the L1D requestor priority to L2
bit [“P” bit] in the cache configuration (CCFG) register. C6712D supports Big Endian mode.
D The C6712/C6712C/C6712D is the lowest-cost entry in the TMS320C6000 platform.
For a more detailed discussion on the similarities/differences among the C6211, C6711, and C6712 devices,
see the How to Begin Development Today with the TMS320C6211 DSP, How to Begin Development with the
TMS320C6711 DSP, and How to Begin Development With the TMS320C6712 DSP application reports
(literature number SPRA474, SPRA522, and SPRA693, respectively).
For a more detailed discussion on the migration of a C6211, C6211B, C6711, or C6711B device to a
TMS320C6711C device, see the Migrating from TMS320C6211(B)/6711(B) to TMS320C6711C application
report (literature number SPRA837).
For a more detailed discussion on the migration of a C6712 device to a TMS320C6712C device, see the
Migrating from TMS320C6712 to TMS320C6712C application report (literature number SPRA852).
TMS320C62x and C67x are trademarks of Texas Instruments.
†
This value is compatible with existing 1.26V designs.