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EZ-OTG™ Programmable USB
On-The-Go
CY7C67200
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-08014 Rev. *G Revised November 14, 2006
EZ-OTG Features
• Single-chip programmable USB dual-role (Host/Peripheral)
controller with two configurable Serial Interface Engines
(SIEs) and two USB ports
• Supports USB OTG protocol
• On-chip 48-MHz 16-bit processor with dynamically
switchable clock speed
• Configurable IO block supports a variety of IO options or up
to 25 bits of General Purpose IO (GPIO)
• 4K × 16 internal mask ROM contains built-in BIOS that
supports a communication-ready state with access to I
2
C™
EEPROM interface, external ROM, UART, or USB
• 8K x 16 internal RAM for code and data buffering
• 16-bit parallel host port interface (HPI) with DMA/Mailbox
data path for an external processor to directly access all
on-chip memory and control on-chip SIEs
• Fast serial port supports from 9600 baud to 2.0M baud
• SPI supports both master and slave
• Supports 12 MHz external crystal or clock
• 2.7V to 3.6V power supply voltage
• Package option: 48-pin FBGA
Typical Applications
EZ-OTG is a very powerful and flexible dual-role USB
controller that supports a wide variety of applications. It is
primarily intended to enable USB OTG capability in applica-
tions such as:
• Cellular phones
• PDAs and pocket PCs
• Video and digital still cameras
• MP3 players
• Mass storage devices
Timer 0 Timer 1
Watchdog
Control
4Kx16
ROM BIOS
8Kx16
RAM
CY16
16-bit RISC CORE
SIE1
USB-A
SIE2
USB-A
OTG
HOST/
Peripheral
USB Ports
D+,D-
D+,D-
UART I/F
HSS I/F
I2C
EEPROM I/F
HPI I/F
SPI I/F
nRESET
CY7C67200
GPIO [24:0]
PLL
X1
X2
GPIO
SHARED INPUT/OUTPUT PINS
Vbus, ID
Mobile
Power
Booster
Block Diagram
CY7C67200
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